US2011263124A1PendingUtilityA1

Method of fabricating semiconductor device

Assignee: TOSHIBA KKPriority: May 12, 2008Filed: Jun 29, 2011Published: Oct 27, 2011
Est. expiryMay 12, 2028(~1.7 yrs left)· nominal 20-yr term from priority
H10D 64/035H10D 30/681H10B 41/30
45
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Claims

Abstract

A method of fabricating a semiconductor device according to one embodiment includes: forming a plurality of Si-based pattern portions above a semiconductor substrate, the plurality of Si-based pattern portions being adjacent in a direction substantially parallel to a surface of the semiconductor substrate via insulating films; forming a metal film above the plurality of Si-based pattern portions and the insulating films so as to contact with the plurality of Si-based pattern portions; processing whole areas or upper portions of the plurality of Si-based pattern portions into a plurality of silicide layers by a silicidation reaction between the plurality of Si-based pattern portions and the metal film by heat treatment; and removing the plurality of silicide layers formed above the insulating films by applying planarizing treatment to the plurality of silicide layers.

Claims

exact text as granted — not AI-modified
1 . A method of fabricating a semiconductor device, comprising:
 forming a plurality of Si-based pattern portions above a semiconductor substrate, the plurality of Si-based pattern portions being adjacent in a direction substantially parallel to a surface of the semiconductor substrate via insulating films;   forming a metal film above the plurality of Si-based pattern portions and the insulating films so as to contact with the plurality of Si-based pattern portions;   processing whole areas or upper portions of the plurality of Si-based pattern portions into a plurality of silicide layers by a silicidation reaction between the plurality of Si-based pattern portions and the metal film by first heat treatment;   removing an unreacted portion of the metal film, after processing the whole area or the upper portions of the plurality of Si-based pattern portions into the plurality of silicide layers; and   removing the plurality of silicide layers formed above the insulating films by applying planarizing treatment to the plurality of silicide layers, after removing the unreacted portion of the metal film.   
     
     
         2 . (canceled) 
     
     
         3 . The method of fabricating a semiconductor device according to  claim 1 , wherein a second heat treatment is applied to the plurality of silicide layers under a temperature condition higher than the first heat treatment after removing the unreacted portion of the metal film and before applying the planarizing treatment to the plurality of silicide layers. 
     
     
         4 - 6 . (canceled) 
     
     
         7 . The method of fabricating a semiconductor device according to  claim 1 , wherein each of the plurality of silicide layers is a control gate of a stacked gate. 
     
     
         8 . The method of fabricating a semiconductor device according to  claim 1 , wherein the metal film comprises at least one of Ni, Pt, Ti and Co. 
     
     
         9 . The method of fabricating a semiconductor device according to  claim 1 , wherein the first heat treatment is carried out under a temperature condition higher than 350° C. and lower than 450° C. 
     
     
         10 - 20 . (canceled)

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