US2011256710A1PendingUtilityA1

Semiconductor device and method for manufacturing same

Assignee: RENESAS ELECTRONICS CORPPriority: Oct 26, 2006Filed: Jun 28, 2011Published: Oct 20, 2011
Est. expiryOct 26, 2026(~0.2 yrs left)· nominal 20-yr term from priority
H10W 20/037H10W 20/493
44
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Claims

Abstract

When a metal cap film is provided on an electric fuse, the break-ability of the electric fuse is reduced. A semiconductor device 1 includes interconnects 10 , an electric fuse 20 and metal cap films 30 . Both of the interconnects 10 and the electric fuse 20 are composed of Cu. The interconnects 10 and the electric fuse 20 are provided in the same layer in the interconnect layer 40. The metal cap films 30 are provided only on the interconnects 10 and not provided on the electric fuse 20.

Claims

exact text as granted — not AI-modified
1 . A method for manufacturing a semiconductor device, comprising:
 forming an interconnect in an interconnect layer;   forming an electric fuse in said interconnect layer that also includes said interconnect; and   forming a metal cap film only on said interconnect except on said electric fuse.   
     
     
         2 . The method for manufacturing the semiconductor device as set forth in  claim 1 ,
 wherein said interconnect and said electric fuse are formed simultaneously with the same material.   
     
     
         3 . The method for manufacturing the semiconductor device as set forth in  claim 1 ,
 wherein said forming said metal cap film includes conducting a plating method on a surface of said interconnect layer, said interconnect and said electric fuse being exposed on said surface.   
     
     
         4 . The method for manufacturing the semiconductor device as set forth in  claim 3 ,
 wherein said plating method is an electroless plating process.   
     
     
         5 . The method for manufacturing the semiconductor device as set forth in  claim 1 ,
 wherein a first data ratio, which is a data ratio in a region in vicinity of said electric fuse, is smaller than a second data ratio, which is a data ratio in a region provided with said interconnect.   
     
     
         6 . The method for manufacturing the semiconductor device as set forth in  claim 5 ,
 wherein said first data ratio is equal to or lower than 5%, and said second data ratio is equal to or higher than 10%.

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