US2011254096A1PendingUtilityA1

Semiconductor device having non-silicide region in which no silicide is formed on diffusion layer

Assignee: TOSHIBA KKPriority: Dec 25, 2007Filed: Jun 23, 2011Published: Oct 20, 2011
Est. expiryDec 25, 2027(~1.4 yrs left)· nominal 20-yr term from priority
H10D 62/371H10D 62/314H10D 89/811H10D 84/83H10D 84/038H10D 84/013H10D 30/603H10D 30/0221H10D 30/0212H10D 62/151
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Claims

Abstract

A semiconductor device includes first and second MOSFETs corresponding to at least first power source voltage and second power source voltage lower than the first power source voltage, and non-silicide regions formed in drain portions of the first and second MOSFETs and having no silicide formed therein. The first MOSFET includes first diffusion layers formed in source/drain portions, a second diffusion layer formed below a gate portion and formed shallower than the first diffusion layer and a third diffusion layer formed with the same depth as the second diffusion layer in the non-silicide region, and the second MOSFET includes fourth diffusion layers formed in source/drain portions, a fifth diffusion layer formed below a gate portion and formed shallower than the fourth diffusion layer and a sixth diffusion layer formed shallower than the fourth diffusion layer and deeper than the fifth diffusion layer in the non-silicide region.

Claims

exact text as granted — not AI-modified
1 . A semiconductor device comprising:
 a plurality of metal oxide semiconductor field-effect transistors (MOSFETs) respectively corresponding to a plurality of power source voltages, and   non-silicide regions formed in drain portions of the plurality of MOSFETs and having no silicide formed therein,   wherein diffusion layer resistance regions with the same depth as that of LDD diffusion layers of that MOSFET which corresponds to highest power source voltage among the plurality of MOSFETs are formed in the non-silicide regions of the plurality of MOSFETs.   
     
     
         2 . The semiconductor device according to  claim 1 , wherein the diffusion layer resistance region is deeper than the LDD diffusion layers of the MOSFETs other than the MOSFET corresponding to the highest power source voltage. 
     
     
         3 . The semiconductor device according to  claim 1 , further comprising those of diffusion layers whose conductivity type is the same as that of the LDD diffusion layer and diffusion layers whose conductivity type is different from that of the LDD-diffusion layer which are formed deeper than the diffusion layer resistance region in the non-silicide regions of the plurality of MOSFETs. 
     
     
         4 . The semiconductor device according to  claim 1 , wherein the diffusion layer resistance regions function as ballast resistors.

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