Semiconductor wafer including cracking stopper structure and method of forming the same

Abstract

A semiconductor includes a semiconductor substrate having a main face, the semiconductor device having a device region and a dicing line and a stack of insulating layers over the semiconductor substrate. There is a multi-level interconnection structure in the stack of insulating layers. A passivation film covers the semiconductor substrate, the passivation film having an opening. The stack of insulating layers has a groove which extends from the opening and penetrates at least one of the insulating layers, the groove is positioned between the device region and the dicing line, and the groove is narrower in width than the opening.

1 . A semiconductor device, comprising:
 a semiconductor substrate having a main face, the semiconductor device having a device region and a dicing line;   a stack of insulating layers over the semiconductor substrate;   a multi-level interconnection structure in the stack of insulating layers; and   a passivation film covering the semiconductor substrate, the passivation film having an opening,   wherein the stack of insulating layers has a groove which extends from the opening and penetrates at least one of the insulating layers, the groove is positioned between the device region and the dicing line, and the groove is narrower in width than the opening.   
     
     
         2 . The semiconductor device according to  claim 1 , wherein the groove surrounds the device region. 
     
     
         3 . The semiconductor device according to  claim 1 , wherein the multi-level interconnection structure has a damascene structure. 
     
     
         4 . The semiconductor device according to  claim 1 , wherein the groove comprises a tapered portion. 
     
     
         5 . The semiconductor device according to  claim 1 , wherein at least a part of the groove is positioned in a region free of an interconnection covered by the passivation film. 
     
     
         6 . The semiconductor device according to  claim 1 , wherein at least one of the insulating layers is a Low-k film. 
     
     
         7 . The semiconductor device according to  claim 1 , wherein the groove is positioned in a dicing region of the semiconductor substrate. 
     
     
         8 . The semiconductor device according to  claim 1 , further comprising an insulating film between the insulating layers, the insulating film being different in material from the insulating layers. 
     
     
         9 . The semiconductor device according to  claim 8 , wherein the groove penetrates the insulating film. 
     
     
         10 . A semiconductor device, comprising:
 a semiconductor substrate having a main face, the semiconductor substrate having a device region and a dicing line;   a stack of insulating layers over the semiconductor substrate; and   a multi-level interconnection structure in the stack of insulating layers, the multi-level interconnection structure having an uppermost interconnection which has an opening,   wherein the stack of insulating layers has a groove which extends from the opening and penetrates at least one of the insulating layers, the groove is positioned between the device region and the dicing line, and the groove is narrower in width than the opening.   
     
     
         11 . The semiconductor device according to  claim 10 , wherein the groove surrounds the device region. 
     
     
         12 . The semiconductor device according to  claim 10 , wherein the multi-level interconnection structure has a damascene structure. 
     
     
         13 . The semiconductor device according to  claim 10 , wherein the groove comprises a tapered portion. 
     
     
         14 . The semiconductor device according to  claim 10 , wherein at least one of the insulating layers is a Low-k film. 
     
     
         15 . The semiconductor device according to  claim 10 , wherein the groove is positioned in a dicing region of the semiconductor substrate. 
     
     
         16 . The semiconductor device according to  claim 10 , further comprising an insulating film between the insulating layers, the insulating film being different in material from the insulating layers. 
     
     
         17 . The semiconductor device according to  claim 16 , wherein the groove penetrates the insulating film.