Drive circuit and display device
Abstract
The present invention provides a drive circuit and a display device realizing reduced variations at both a trailing timing and a rising timing of output voltage. The drive circuit includes an input-side inverter circuit and an output-side inverter circuit connected to each other in series and inserted between a high-voltage line and a low-voltage line. The output-side inverter circuit includes: a first transistor having a drain connected to the high-voltage line side and a source connected to an output side of the output-side inverter circuit; a second transistor having a drain connected to the low-voltage line side and a source connected to an output side of the output-side inverter circuit; and a correction circuit correcting gate voltage of each of the first and second transistors.
Claims
exact text as granted — not AI-modified1 . A drive circuit comprising an input-side inverter circuit and an output-side inverter circuit connected to each other in series and inserted between a high-voltage line and a low-voltage line,
wherein the output-side inverter circuit includes: a first transistor having a drain connected to the high-voltage line side and a source connected to an output side of the output-side inverter circuit; a second transistor having a drain connected to the low-voltage line side and a source connected to an output side of the output-side inverter circuit; and a correction circuit correcting gate voltage of each of the first and second transistors.
2 . The drive circuit according to claim 1 , wherein the correction circuit set a threshold voltage of the first transistor or a voltage corresponding to the threshold voltage of the first transistor, for a gate of the first transistor, as an offset voltage to the first transistor, and sets a threshold voltage of the second transistor or a voltage corresponding to the threshold voltage of the second transistor, for a gate of the second transistor as an offset voltage to the second transistor.
3 . The drive circuit according to claim 2 , wherein the correction circuit includes:
a third transistor whose source or drain is connected to a gate side of the first transistor and whose source or drain which is not connected to the gate side of the first transistor is connected to a source side of the first transistor; and a first capacitive element whose one end is connected to the gate side of the first transistor and whose other end is connected to an input side of the output-side inverter circuit.
4 . The drive circuit according to claim 3 , wherein the correction circuit further includes a fourth transistor whose source or drain is connected to a source side of the first transistor and whose source or drain which is not connected to the source side of the first transistor is connected to an output side of the output-side inverter circuit.
5 . The drive circuit according to claim 4 , wherein the correction circuit further includes a fifth transistor whose source or drain is connected to the gate side of the first transistor and whose source or drain which is not connected to the gate side of the first transistor is connected to the drain side of the second transistor.
6 . The drive circuit according to claim 2 , wherein the correction circuit further includes:
a sixth transistor whose source or drain is connected to the gate side of the second transistor and whose source or drain which is not connected to the gate side of the second transistor is connected to the source side of the second transistor; and a second capacitive element whose one end is connected to the gate side of the second transistor and whose other end is connected to an input side of the output-side inverter circuit.
7 . The drive circuit according to claim 6 , wherein the correction circuit further includes a seventh transistor whose source or drain is connected to the source side of the second transistor and whose source or drain which is not connected to the source side of the second transistor is connected to an output side of the output-side inverter circuit.
8 . The drive circuit according to claim 7 , wherein the correction circuit further includes an eighth transistor whose source or drain is connected to the gate side of the second transistor and whose source or drain which is not connected to the gate side of the second transistor is connected to the drain side of the first transistor.
9 . A display device comprising:
a display section including a plurality of scan lines disposed in rows, a plurality of signal lines disposed in columns, and a plurality of pixels disposed in a matrix; and a drive section for driving the pixels, wherein the drive section has a plurality of drive circuits provided for the scan lines in a one-to-one corresponding manner, the drive circuit has an input-side inverter circuit and an output-side inverter circuit connected to each other in series and inserted between a high-voltage line and a low-voltage line, and the output-side inverter circuit includes: a first transistor whose drain is connected to the high-voltage line side and whose source is connected to an output side of the output-side inverter circuit, a second transistor whose drain is connected to the low-voltage line side and whose source is connected to an output side of the output-side inverter circuit, and a correction circuit for correcting gate voltage of each of the first and second transistors.Join the waitlist — get patent alerts
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