method of manufacturing a semiconductor integrated circuit device
Abstract
A circuit pattern having a size finer than a half of a wavelength of an exposure beam is transferred on a semiconductor wafer plane with an excellent accuracy by means of a mask whereupon an integrated circuit pattern is formed and a reduction projection aligner. The accuracy of transferring the circuit pattern on the semiconductor wafer is improved by synergic effects of super-resolution exposure, wherein a mask cover made of a transparent medium is provided on a pattern side of the integrated circuit mask so as to suppress the aberration of reduction projection alignment, and a method of increasing the number of actual apertures of the optical reduction projection lens system provided with the wafer cover made of the transparent medium on a photoresist side of the semiconductor wafer to which planarizing process is performed.
Claims
exact text as granted — not AI-modified1 . A method of manufacturing a semiconductor integrated circuit device including DRAM, flash memory, or microprocessor mounted on the same semiconductor substrate, the method comprising steps of:
forming a film comprising an insulating film or an electro-conductive film on a semiconductor wafer; forming a photoresist film on the film; preparing a circuit pattern data for a mask used for a conventional reduction projection exposure in which numerical aperture of a reduction projection lens is less than 1; making a mask on which a reduced circuit pattern is formed after forming a circuit pattern data for forming a circuit pattern on the film corresponding to another reduction projection exposure in which numerical aperture of a reduction projection lens is equal to or more than 1; the circuit pattern data formed by a data conversion process including reducing a shape of circuit pattern to a similar shape; placing the mask at a predetermined position of a reduction projection exposure device; placing a semiconductor wafer at a predetermined position under the condition that a wafer cover made of transparent liquid contacts the surface of the photoresist formed on the semiconductor wafer; exposing the photoresist formed on the semiconductor wafer by irradiating light to the mask, the irradiating light transmitted the reduction projection lens whose numerical aperture is equal to or more than 1 and the wafer cover made of transparent liquid; and developing the photoresist film after removing the wafer cover made of transparent liquid.
2 . The method of manufacturing a semiconductor device of claim 1 , wherein the film forming step includes steps of:
forming a film comprising an insulating film or an electro-conductive film made by a film forming method including the CVD method and the sputtering method; and, performing planarization including a chemical mechanical lapping method or a chemical mechanical polishing method to the film or a part of the film; and wherein the exposing step includes a step of:
exposing the photoresist on the semiconductor wafer by exposure light transmitted the wafer cover made of transparent liquid under the condition of suppressing generation of micro bubble in the liquid by the planarization caused by moving on relative plane of an object plane of the reduction projection lens and the semiconductor wafer plane.
3 . A method of manufacturing a semiconductor integrated circuit device including DRAM, flash memory, or microprocessor mounted on the same semiconductor substrate, the method comprising steps of:
forming a film comprising an insulating film or an electro-conductive film on a semiconductor wafer; forming a photoresist film on the film; forming a circuit pattern data by computer processing under the condition of setting a design rule of a circuit patter on a mask by reduction projection exposure on the photoresist over the film with an exposure light under the condition including that wave length of the exposure light is either 193 nm or 157 nm and the numerical aperture of the reduction projection lens is equal to or more than 1; making a mask of a circuit pattern which is designed; placing the mask at a predetermined position of a reduction projection exposure device; placing a semiconductor wafer at a predetermined position under the condition that a wafer cover made of transparent liquid contacts the surface of the photoresist formed on the semiconductor wafer; exposing the photoresist formed on the semiconductor wafer by irradiating light to the mask, the irradiating light transmitted the reduction projection lens and the wafer cover made of transparent liquid; and developing the photoresist film after removing the wafer cover made of transparent liquid.
4 . The method of manufacturing a semiconductor device of claim 3 , wherein the film forming step includes the steps of:
forming a film comprising an insulating film or an electro-conductive film made by a film forming method including the CVD method and the sputtering method; and, performing planarization including a chemical mechanical lapping method or a chemical mechanical polishing method to the film or a part of the film; and wherein the exposing step includes a step of:
exposing the photoresist on the semiconductor wafer by exposure light transmitted the wafer cover made of transparent liquid under the condition of suppressing generation of micro bubble in the liquid by the planarization caused by moving on relative plane of an object plane of the reduction projection lens and the semiconductor wafer plane.
5 . A method of manufacturing a semiconductor integrated circuit device including DRAM, flash memory, or microprocessor mounted on the same semiconductor substrate, the method comprising steps of:
forming a film comprising an insulating film or an electro-conductive film on a semiconductor wafer; forming a photoresist film on the film; designing and forming a mask of the circuit pattern to be formed on the film provided with means of inverting a phase of the mask transmitting light one another and corresponding to a reduction projection exposure with an exposure light under the condition that wave length of the exposure light is either 193 nm or 157 nm and the numerical aperture of the reduction projection lens is equal to or more than 1; or to be formed on the film which optical proximity correction is made for correcting size and shape of the circuit pattern on the mask in prospect of deformation of the circuit pattern formed on the film and corresponding to a reduction projection exposure with an exposure light under the condition including that wave length of the exposure light is either 193 nm or 157 nm and the numerical aperture of the reduction projection lens is equal to or more than 1; placing the mask at a predetermined position of the reduction projection exposure device; placing a semiconductor wafer at a predetermined position under the condition that a wafer cover made of transparent liquid contacts the surface of the photoresist formed on the semiconductor wafer; exposing the photoresist formed on the semiconductor wafer by irradiating a light to the mask, the irradiating light transmitted the reduction projection lens and the wafer cover made of transparent liquid; developing the photoresist film after removing the wafer cover made of transparent liquid; and forming a circuit pattern on the semiconductor wafer based on a circuit pattern obtained by development of the resist.
6 . The method of manufacturing a semiconductor device of claim 5 , wherein the film forming step includes steps of:
forming a film comprising an insulating film or an electro-conductive film made by a film forming method including the CVD method and the sputtering method; and, performing planarization including a chemical mechanical lapping method or a chemical mechanical polishing method to the film or a part of the film; and wherein the exposing step includes a step of:
exposing the photoresist on the semiconductor wafer by exposure light transmitted the wafer cover made of transparent liquid under the condition of suppressing generation of micro bubble in the liquid by the planarization caused by moving on relative plane of an object plane of the reduction projection lens and the semiconductor wafer plane.
7 . A method of manufacturing a semiconductor integrated circuit device including DRAM, flash memory, or microprocessor mounted on the same semiconductor substrate, the method comprising the steps of:
forming a film comprising an insulating film or an electro-conductive film made by a film forming method including the CVD method and the sputtering method; performing planarization including a chemical mechanical lapping method or a chemical mechanical polishing method to the film or a part of the film; forming a photoresist film on the film; forming a mask for forming a circuit pattern on the film; placing the mask at a predetermined position of the reduction projection exposure device; placing a semiconductor wafer at a predetermined position under the condition that a wafer cover made of transparent liquid contacts the surface of the photoresist formed on the semiconductor wafer; exposing the photoresist on the semiconductor wafer by the exposure light transmitted the wafer cover made of transparent liquid and the projection lens of the reduction projection exposure device, under the condition of suppressing generation of micro bubble by the planarization in the liquid caused by moving on relative plane of an object plane of the projection lens and the semiconductor wafer plane; developing the photoresist film after removing the wafer cover made of transparent liquid; and forming a circuit pattern on the semiconductor wafer based on a circuit pattern obtained by development of the resist.
8 . The method of manufacturing a semiconductor device of claim 7 , wherein the forming step of the mask is
to reduce a shape of the circuit pattern data to a similar shape by data conversion process using a circuit pattern data of mask used for a conventional reduction projection exposure in which numerical aperture of a reduction projection lens is less than 1, and then design and form a mask of the circuit pattern which is reduced on the mask corresponding to a reduction projection light with another reduction projection lens whose numerical aperture is equal to or more than 1; or to design and form a mask for a circuit pattern to be formed on the film corresponding to a reduction projection exposure with an exposure light under the condition including that wave length of the exposure light is either 193 nm or 157 nm and numerical aperture of the reduction projection lens is equal to or more than 1.
9 . A method of manufacturing a semiconductor integrated circuit device including DRAM, flash memory, or microprocessor mounted on the same semiconductor substrate, the method comprising steps of:
forming a film comprising an insulating film or an electro-conductive film on a semiconductor wafer; forming a photoresist film on the film; preparing a mask of the circuit pattern corresponding to a reduction projection exposure with an exposure light under the condition including that wave length of the exposure light is either 193 nm or 157 nm and the numerical aperture of the reduction projection lens is equal to or more than 1; placing the mask at a predetermined position of the reduction projection exposure device; placing a semiconductor wafer at a predetermined position while transparent liquid contacts the surface of the photoresist formed on the semiconductor wafer; irradiating the circuit pattern of the mask with a light which is tilted only by optimized degrees corresponding to the direction and cycle of the circuit pattern on the mask such that the pattern formed on the semiconductor wafer by the photoresist exposure becomes more clearly when the exposure light from the reduction projection exposure device irradiates the mask; exposing the photoresist formed on the semiconductor wafer by irradiating light to the mask, the irradiating light transmitted the projection lens of the reduction projection exposure device and the wafer cover made of transparent liquid; and developing the photoresist film after removing the wafer cover made of transparent liquid.
10 . The method of manufacturing a semiconductor device of claim 9 , wherein the film forming step includes steps of:
forming a film comprising an insulating film or an electro-conductive film made by a film forming method including the CVD method and the sputtering method; and, performing planarization including a chemical mechanical lapping method or a chemical mechanical polishing method to the film or a part of the film constituting the film; and wherein the exposing step includes a step of: exposing the photoresist on the semiconductor wafer by exposure light transmitted the wafer cover made of transparent liquid under the condition of suppressing generation of micro bubble in the liquid by the planarization caused by moving on relative plane of an object plane of the reduction projection lens and the semiconductor wafer plane.Join the waitlist — get patent alerts
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