Semiconductor device and methods of manufacturing the same

Abstract

A semiconductor device may include plugs disposed in a zigzag pattern, interconnections electrically connected to the plugs and a protection pattern which is interposed between the plugs and the interconnections to selectively expose the plugs. The interconnections may include a connection portion which is in contact with plugs selectively exposed by the protection pattern. A method of manufacturing a semiconductor device includes, after forming a molding pattern and a mask pattern, selectively etching a protection layer using the mask pattern to form a protection pattern exposing a plug.

1 . A semiconductor device, comprising:
 an interlayer insulating layer on a substrate;   plugs disposed in the interlayer insulating layer in a first direction;   interconnections which extend in a second direction crossing the first direction and include a connection portion which has a width smaller than a width of the first direction of the plugs and is in contact with the plugs, the interconnections having a same width as the connection portion in the first direction; and   a protection pattern in which the connection portion penetrates, the protection pattern being interposed between the interlayer insulating layer and the interconnections and extending on the interlayer insulating layer and the plugs.   
     
     
         2 . The semiconductor device of  claim 1 , wherein the plugs include first plugs and second plugs, and
 wherein the first plugs and the second plugs are disposed in the first direction, and each of the second plugs is disposed between the adjacent first plugs and is spaced apart from the first plugs in the second direction.   
     
     
         3 . The semiconductor device of  claim 1 , wherein the connection portion has same width as top surfaces of the plugs in the second direction. 
     
     
         4 . The semiconductor device of  claim 1 , further comprising molding patterns between the interconnections. 
     
     
         5 . The semiconductor device of  claim 4 , wherein the molding patterns which are in contact with side surfaces of the interconnections extend in the second direction and are overlapped with edges of the plugs to be disposed on the protection pattern. 
     
     
         6 . The semiconductor device of  claim 4 , wherein the molding patterns include material having an etching selectivity with respect to the protection layer. 
     
     
         7 . The semiconductor device of  claim 4 , wherein the protection pattern includes silicon nitride and the molding patterns include silicon oxide. 
     
     
         8 . The semiconductor device of  claim 1 , further comprising a string selection line which is adjacent to the plugs on the substrate and extends in the first direction, word lines adjacent to the string selection line and a ground selection line adjacent to the word lines.