Signal interfacing techniques to simplify integrated circuit radio designs

Abstract

A signal interfacing technique for connecting signals between a signal processing device and a MIMO radio integrated circuit (IC) involving multiplexing two or more signals on a connection pin between the radio IC and a signal processing device. According to one technique, transmit and receive signals are multiplexed such that during a transmit mode a transmit signal is coupled on the connection pin from the signal processing device to the radio IC, and during a receive mode a receive signal is coupled from the radio IC on the connection pin to the signal processing device. According to another technique, in-phase (I) and quadrature (Q) signals are multiplexed on a connection pin during both transmit and receive modes.

1 . A signal processing device comprising:
 a first transmitter and a first receiver, each of which includes an in-phase (I) signal path and a quadrature (Q) signal path;   a second transmitter and a second receiver, each of which includes an in-phase (I) signal path and a quadrature (Q) signal path;   a first transmitter connection pin on which a transmit I signal and a transmit Q signal are multiplexed for connection to the respective I and Q signal paths of the first transmitter;   a second transmitter connection pin on which a transmit I signal and a transmit Q signal are multiplexed for connection to the respective I and Q signal paths of the second transmitter;   a first receiver connection pin on which a receive I signal and a receive Q signal are multiplexed from the respective I and Q signal paths of the first receiver; and   a second receiver connection pin on which a receive I signal and a receive Q signal are multiplexed from the respective I and Q signal paths of the second receiver.   
     
     
         2 . The signal processing device of  claim 1 , and further comprising a first multiplexer circuit that couples from the first transmitter connection pin the transmit I and transmit Q signals during different time intervals for connection to the I and Q signal paths, respectively, of the first transmitter. 
     
     
         3 . The signal processing device of  claim 2 , wherein the first multiplexer circuit alternately couples the transmit I and transmit Q signals, respectively, from the first transmitter pin to the I and Q signal paths, respectively, of the first transmitter. 
     
     
         4 . The signal processing device of  claim 2 , and further comprising a second multiplexer circuit that couples during different time intervals the receive I and receive Q signals to the first receiver connection pin from the I and Q signal paths, respectively, of the first receiver. 
     
     
         5 . The signal processing device of  claim 4 , wherein the second multiplexer circuit alternately couples the receive I and receive Q signals to the first receiver connection pin from the I and Q signal paths, respectively, of the first receiver. 
     
     
         6 . The signal processing device of  claim 1 , and further comprising a multiplexer circuit that during a receive mode couples to the receiver connection pin the receive I and receive Q signals during different time intervals from the I and Q signal paths, respectively, of the receiver, and during a transmit mode, couples from the transmitter connection pin the transmit I and transmit Q signals during different time intervals to the I and Q signal paths, respectively of the transmitter. 
     
     
         7 . The signal processing device of  claim 6 , and further comprising a timing circuit that supplies a timing signal to the multiplexer circuit to control the timing. 
     
     
         8 . The signal processing device of  claim 1 , and further comprising a plurality of transmitters and a plurality of receivers such that a pair of a transmitter and a receiver are associated with a corresponding one of a plurality of antennas connected to a radio IC, and further comprising a plurality of transmitter connection pins each associated with a corresponding transmitter and a plurality of receiver connection pins each associated with a corresponding receiver, each transmitter connection pin on which corresponding transmit I and transmit Q signals are multiplexed for connection to the I and Q signal paths, respectively, of the associated transmitter, and each receiver connection pin on which corresponding receive I and receive Q signals are multiplexed for connection from the I and Q signal paths, respectively, of the associated receiver. 
     
     
         9 . The signal processing device of  claim 8 , and further comprising a plurality of transmitter multiplexer circuits each associated with a corresponding transmitter to multiplex the corresponding transmit I signal and transmit Q signal from the corresponding transmitter connection pin to the respective I and Q signal paths of the corresponding transmitter. 
     
     
         10 . The signal processing device of  claim 9 , wherein each transmitter multiplexer circuit alternately couples the corresponding transmit I signal and transmit Q signal from the corresponding transmitter connection pin to the respective I and Q signal paths of the corresponding transmitter. 
     
     
         11 . The signal processing device of  claim 8 , and further comprising a plurality of multiplexer circuits each associated with a corresponding transmitter/receiver pair that multiplexes the corresponding transmit I signal and transmit Q signal from the corresponding transmitter connection pin to the respective I and Q signal paths of the corresponding transmitter, and that multiplexes the corresponding receive I signal and receive Q signal from the respective I and Q signal paths of the corresponding receiver to the corresponding receiver connection pin. 
     
     
         12 . The signal processing device of  claim 8 , wherein each of the I and Q signal paths of each of the transmitters and receivers having differential signal paths, and further comprising a plurality of pairs of transmitter connection pins on which corresponding differential transmit I and transmit Q signals are multiplexed, and a plurality of pairs of receiver connection pins on which corresponding differential receive I and receive Q signals are multiplexed. 
     
     
         13 . The signal processing device of  claim 1 , wherein each of the I and Q signal paths of the transmitter and receiver are differential, and further comprising a pair of transmitter connection pins on which differential transmit I and transmit Q signals are multiplexed, and a pair of receiver connection pins on which differential receive I and receive Q signals are multiplexed.