Memory devices including dielectric thin film and method of manufacturing the same

Abstract

A memory device including a dielectric thin film having a plurality of dielectric layers and a method of manufacturing the same are provided. The memory device includes: a bottom electrode; at least one dielectric thin film disposed on the bottom electrode and having a plurality of dielectric layers with different charge trap densities from each other; and an top electrode disposed on the dielectric thin film. Therefore, a memory device, which can be readily manufactured by a simple process and can be highly integrated using its simple structure, can be provided.

1 . A method of manufacturing a memory device, comprising the steps of:
 forming a bottom electrode;   forming at least one dielectric thin film having a plurality of dielectric layers with different charge trap densities from each other on the bottom electrode; and   forming an top electrode on the dielectric thin film.   
     
     
         2 . The method of  claim 1 , wherein the step of forming the dielectric thin film comprises the steps of:
 forming a lower dielectric layer on the bottom electrode; and   forming an upper dielectric layer using a dielectric equal to or different from the lower dielectric layer on the lower dielectric layer.   
     
     
         3 . The method of  claim 1 , wherein the step of forming the dielectric thin film comprises the step of forming an intermediate dielectric layer using a dielectric equal to at least one of the lower and upper dielectric layers or a dielectric different from the lower and upper dielectric layers, between the lower dielectric layer formed on the bottom electrode and the upper dielectric layer formed on the lower dielectric layer. 
     
     
         4 . The method of  claim 3 , wherein the intermediate dielectric layer acts as a barrier which prevents traps included in the lower and upper dielectric layers from moving. 
     
     
         5 . The method of  claim 2 , wherein when the lower dielectric layer, the intermediate dielectric layer, and the upper dielectric layer are formed of the same dielectric, deposition conditions of the respective dielectric layers are different from each other. 
     
     
         6 . The method of  claim 5 , wherein the deposition condition is at least one of a deposition temperature, a deposition time, a deposition rate and a deposition method. 
     
     
         7 . The method of  claim 1 , wherein the dielectric thin film has a thickness of 3 nm to 100 nm. 
     
     
         8 . The method of  claim 1 , wherein the dielectric layer is formed of a dielectric having a dielectric constant ranging from 3 to 1000. 
     
     
         9 . The method of  claim 1 , wherein the dielectric layer is composed of:
 a dielectric formed of TiO 2 , ZrO 2 , HfO 2 , V 2 O 5 , Nb 2 O 5 , Ta 2 O 5 , NiO, PdO, or a material in which at least one of Ti, V, Cr, Mn, Fe, Co, Ni, Cu, Zn, Zr, Hf, Nb, Ta, Pd, and La group elements is added to TiO 2 , ZrO 2 , HfO 2 , V 2 O 5 , Nb 2 O 5 , Ta 2 O 5 , NiO, or PdO, as an impurity;   a dielectric of ABO 3  type; or   a dielectric consisting of a material having a perovskite structure, except the ABO 3  type, and impurities added to the material.