Frequency Synthesizer

Abstract

A frequency synthesizer. The frequency synthesizer comprises a harmonic locked phase/frequency detector, a low pass filter, a voltage controlled oscillator, and a frequency divider. The harmonic locked phase/frequency detector receives a reference signal and a divided signal. The low pass filter is coupled to the harmonic locked phase/frequency detector. The voltage controlled oscillator is coupled to the low pass filter and provides an output signal. The frequency divider is coupled between the voltage controlled oscillator and the harmonic locked phase/frequency detector. Frequency of the divided signal is a harmonic frequency of the reference signal.

1 . An inductor configured in a radio frequency circuit, comprising:
 first, second, third and fourth divided inductors between a first terminal and a second terminal,   wherein the first divided inductor is coupled between the first terminal and a first node, the second divided inductor is coupled between the first node and a second node which receives a bias signal, the third divided inductor is coupled between the second node and a third node, and the fourth divided inductor is coupled between the third node and the second terminal,   wherein the first and second terminals and the first and third nodes receive different signals of the radio frequency circuit.   
     
     
         2 . The inductor as claimed in  claim 1 , wherein the signals received by the first and second terminals and the first and third nodes are RF signals. 
     
     
         3 . The inductor as claimed in  claim 1 , wherein the signals received by the first terminal and the second terminal are 180° out of phase and the signals received by the first node and the third node are 180° out of phase. 
     
     
         4 . The inductor as claimed in  claim 1 , wherein the first and fourth divided inductors are symmetrical in layout and the second and third divided inductors are symmetrical in layout. 
     
     
         5 . The inductor as claimed in  claim 1 , being utilized in a distributed LC tank of a voltage controlled oscillator. 
     
     
         6 . The inductor as claimed in  claim 5 , wherein the voltage controlled oscillator further comprises:
 a pair of MOS transistors with sources coupled to a ground and gates cross-coupled to drains thereof,   wherein the distributed LC tank is coupled to the drains of the MOS transistors, such that the first, second, third and fourth divided inductors are coupled between the drains of the MOS transistors.   
     
     
         7 . The inductor as claimed in  claim 5 , wherein the distributed LC tank further comprises:
 a first capacitor coupled between the first terminal and the ground;   a second capacitor coupled between the first node and a ground;   a third capacitor coupled between the third node and the ground; and   a fourth capacitor coupled between the second terminal and the ground.   
     
     
         8 . The inductor as claimed in  claim 5 , wherein the distributed LC tank further comprises:
 a first capacitor having a first terminal coupled to the first node and a second terminal selectively coupled to a ground; and   a second capacitor having a first terminal coupled to the third node and a second terminal selectively coupled to the ground or the second terminal of the first capacitor.   
     
     
         9 . The inductor as claimed in  claim 5 , wherein the bias signal is a supply voltage.