Semiconductor device and method of manufacturing same

Abstract

The present invention relates to a method of manufacturing a semiconductor device including (1) forming a laminated structure on a major surface of a semiconductor substrate, the laminated structure comprising at least a first metal layer that forms a Schottky junction with the semiconductor substrate, a second metal layer primarily composed of aluminum, and a third metal layer primarily composed of molybdenum or titanium, (2) patterning the laminated structure into a predetermined configuration, (3) forming a solder bonding metal layer comprising at least nickel, ion or cobalt on the major surface of the semiconductor substrate having the patterned laminated structure formed thereon, (4) patterning the solder bonding metal layer into a pattern configuration identical to that of the laminated structure, (5) cutting the semiconductor substrate on which the laminated structure and the solder bonding metal layer are patterned to form a plurality of semiconductor chips, and (6) bonding the semiconductor chip to a first frame using at least one solder layer formed on the solder bonding metal layer on the major surface of the semiconductor substrate, and bonding a rear face of the semiconductor chip to a second frame.

1 - 11 . (canceled) 
     
     
         12 . A method of manufacturing a semiconductor device comprising:
 forming a laminated structure on a major surface of a semiconductor substrate, the laminated structure including at least a first metal layer that forms a Schottky junction with the semiconductor substrate, a second metal layer primarily composed of aluminum, and a third metal layer primarily composed of molybdenum or titanium;   patterning the laminated structure into a predetermined configuration;   forming a solder bonding metal layer including at least nickel, iron or cobalt on the major surface of the semiconductor substrate having the patterned laminated structure formed thereon;   patterning the solder bonding metal layer into a pattern configuration identical to that of the laminated structure;   cutting the semiconductor substrate on which the laminated structure and the solder bonding metal layer are patterned to form a plurality of semiconductor chips; and   bonding the semiconductor chip to a first frame using at least one solder layer formed on the solder bonding metal layer on the major surface of the semiconductor substrate, and   bonding the rear face of the semiconductor chip to a second frame.   
     
     
         13 . A method of manufacturing a semiconductor device according to  claim 12 , further comprising heating the semiconductor substrate and the laminated structure after pattering the laminated structure before forming the solder bonding metal layer. 
     
     
         14 . A method of manufacturing a semiconductor device according to  claim 12 , further comprising heating the semiconductor substrate, the laminated structure, and the solder bonding metal layer after pattering the solder bonding metal layer. 
     
     
         15 . A method of manufacturing a semiconductor device according to  claim 12 , wherein the laminated structure further comprises a fifth metal layer provided between the first and second metal layers and primarily composed of molybdenum or titanium. 
     
     
         16 . A method of manufacturing a semiconductor device according to  claim 12 , wherein the first metal layer is primarily composed of vanadium or titanium. 
     
     
         17 . A method of manufacturing a semiconductor device according to  claim 12 , wherein the laminated structure further comprises a sixth metal layer provided between the third and forth metal layers and primarily composed of vanadium or titanium. 
     
     
         18 . A method of manufacturing a semiconductor device according to  claim 12 , wherein the second metal layer is thicker than its adjacent metal layers. 
     
     
         19 . A method of manufacturing a semiconductor device according to  claim 12 , wherein the second metal layer is twice or more as thick as its adjacent metal layers. 
     
     
         20 . A method of manufacturing a semiconductor device according to  claim 12 , wherein the laminated structure further comprises a seventh metal layer provided on the forth metal layer and primarily composed of gold, silver, or platinum or their alloy. 
     
     
         21 . A method of manufacturing a semiconductor device according to  claim 12 , wherein the semiconductor substrate is primarily composed of silicon. 
     
     
         22 . A method of manufacturing a semiconductor device according to  claim 12 , wherein the semiconductor chip is a Schottky barrier diode. 
     
     
         23 . A method of manufacturing a semiconductor device comprising:
 forming a laminated structure on a major surface of a semiconductor substrate, the laminated structure including at least a first metal layer that forms a Schottky junction with the semiconductor substrate, a second metal layer primarily composed of aluminum, and a third metal layer primarily composed of molybdenum or titanium;   patterning the laminated structure into a predetermined configuration;   forming a solder bonding metal layer comprised a plurality of metal layers including at least nickel, iron or cobalt on the major surface of the semiconductor substrate having the patterned laminated structure formed thereon;   patterning the solder bonding metal layer into a pattern configuration identical to that of the laminated structure by etching each of the metal layers;   cutting the semiconductor substrate on which the laminated structure and the solder bonding metal layer are patterned to form a plurality of semiconductor chips; and   bonding the semiconductor chip to a first frame using at least one solder layer formed on the solder bonding metal layer on the major surface of the semiconductor substrate, and bonding the rear face of the semiconductor chip to a second frame,   
     
     
         24 . A method of manufacturing a semiconductor device
 according to  claim 23 , further comprising heating the semiconductor substrate and the laminated structure after pattering the laminated structure before forming the solder bonding metal layer.   
     
     
         25 . A method of manufacturing a semiconductor device according to  claim 23 , further comprising heating the semiconductor substrate, the laminated structure, and the solder bonding metal layer after pattering the solder bonding metal layer. 
     
     
         26 . A method of manufacturing a semiconductor device according to  claim 23 , wherein the laminated structure further comprises a fifth metal layer provided between the first and second metal layers and primarily composed of molybdenum or titanium. 
     
     
         27 . A method of manufacturing a semiconductor device according to  claim 23 , wherein the first metal layer is primarily composed of vanadium or titanium. 
     
     
         28 . A method of manufacturing a semiconductor device according to  claim 23 , wherein the laminated structure further comprises a sixth metal layer provided between the third and forth metal layers and primarily composed of vanadium or titanium. 
     
     
         29 . A method of manufacturing a semiconductor device according to  claim 23 , wherein the second metal layer is thicker than its adjacent metal layers. 
     
     
         30 . A method of manufacturing a semiconductor device according to  claim 23 , wherein the second metal layer is twice or more as thick as its adjacent metal layers. 
     
     
         31 . A method of manufacturing a semiconductor device according to  claim 23 , wherein the laminated structure further comprises a seventh metal layer provided on the forth metal layer and primarily composed of gold, silver, or platinum or their alloy.