Method and apparatus for providing a synchronized video presentation without video tearing

Abstract

The present invention provides a method and apparatus for feeding a video stream from a video source in a manner that prevents video tearing.

1 . A method of providing a video presentation from a host to a display device that does not have internal frame memory, the video presentation including a plurality of video frames, the method comprising the steps of:
 sequentially receiving from the host each of the plurality of video frames, wherein the plurality of video frames is received into one or more frame buffers;   sequentially presenting each of the plurality of video frames to the display device while the step of sequentially receiving continues and without using a reference clock derived from a host clock, wherein a plurality of remaining video frames are presented after an initial set of video frames so that each of the remaining video frames are received by the display device in a manner that reduces video drift and prevents video tearing in each of the remaining video frames.   
     
     
         2 . The method according to  claim 1  wherein the step of sequentially presenting includes adjusting a display frame rate while receiving the initial set of video frames to provide synchronization. 
     
     
         3 . The method according to  claim 2  wherein adjusting the display frame rate includes altering at least one blanking interval. 
     
     
         4 . (canceled) 
     
     
         5 . The method according top  claim 3  wherein adjusting the display frame rate includes altering one or more of a vertical blanking interval and a horizontal blanking interval. 
     
     
         6 . (canceled) 
     
     
         7 . The method according to  claim 2  wherein the step of sequentially receiving includes receiving the plurality of video frames at a host frame rate, and the step of sequentially presenting includes displaying the remaining plurality of video frames so that display frame rate matches the host frame rate. 
     
     
         8 . The method according to  claim 7  wherein the step of sequentially presenting includes maintaining, for the remaining plurality of video frames, a fixed phase offset between the remaining plurality of video frames and those corresponding frames as received during the step of receiving. 
     
     
         9 . The method according to  claim 1 , wherein the one or more frame buffers comprises a frame buffer implemented in memory that holds less than one frame. 
     
     
         10 . The method according to  claim 1  wherein the the one or more frame buffers comprises a FIFO implemented in a memory. 
     
     
         11 . The method according to  claim 1  wherein the step of sequentially presenting includes using an algorithm based on a timing wheel in order to maintain synchronization, and wherein where clock cycles of the frame are represented as positive and negative numbers on right and left sides of the timing wheel, respectively. 
     
     
         12 . The method according to  claim 1  wherein the steps of sequentially receiving and sequentially presenting are performed by an MDDI client display controller. 
     
     
         13 . The method according to  claim 1  wherein the steps of sequentially receiving and sequentially presenting are performed by a MIPI peripheral display controller or a MIPI display driver or module. 
     
     
         14 . The method according to  claim 1  wherein the step of sequentially presenting achieves synchronization for the remaining set of video frames by preventing a read pointer associated with a memory from crossing a write pointer associated with the memory, wherein crossings of the read pointer and the write pointer cause video tearing. 
     
     
         15 . An apparatus for providing a video presentation from a host to a display device that does not have internal frame memory, the video presentation including a plurality of video frames, the apparatus comprising:
 a frame buffer configured to receive video frames arriving from the host; and   a video synchronization block that comprises logic configured to implement a timing wheel, wherein the synchronization block is operable to sequentially present each of the plurality of video frames to the display device without using a reference clock derived from a host clock while the step of sequentially receiving continues, wherein a remaining plurality of video frames is presented after an initial set of video frames is presented, so that each of the remaining plurality of video frames is received by the display device in a manner that reduces video drift and prevents visual tearing in each of the remaining plurality of video frames.   
     
     
         16 . The apparatus according to  claim 1  wherein the timing wheel is operable to adjust a display frame rate during the initial set of video frames to provide synchronization. 
     
     
         17 . The apparatus according to  claim 16  wherein the timing wheel is operable to alter at least one of vertical blanking interval and a horizontal blanking interval. 
     
     
         18 - 20 . (canceled) 
     
     
         21 . The apparatus according to  claim 16  wherein the video frame buffer receives the plurality of video frames at a host frame rate, and the video synchronization block displays the remaining plurality of video frames so that display frame rate matches the host frame rate. 
     
     
         22 . The apparatus according to  claim 21  wherein the video frame buffer maintains a fixed phase offset between the remaining plurality of video frames and other frames as received by the video frame buffer. 
     
     
         23 - 24 . (canceled) 
     
     
         24 . The apparatus according to  claim 15 , wherein the video frame buffer is organized as one of a buffer that holds one or more frames, a FIFO and a buffer that holds less than one frame. 
     
     
         25 . The apparatus according to  claim 15  wherein the clock cycles which make up the frame are represented as positive numbers and negative numbers arranged on right and left sides of the timing wheel, respectively. 
     
     
         26 . (canceled) 
     
     
         27 . The apparatus according to  claim 15  wherein the video frame buffer and the video synchronization block are embodied in a display controller. 
     
     
         28 . The apparatus according to  claim 15  wherein the video synchronization block achieves synchronization of the remaining plurality of video frames by preventing a read pointer associated with a memory from crossing a write pointer associated with the memory, wherein crossings of the read pointer and the write pointer cause video tearing.