Regulator and semiconductor device

Abstract

A regulator including a differential amplifier including a differential input stage that differentially receives a reference voltage and an output terminal voltage of the regulator, a drive transistor that has an output connected to an output terminal of the regulator and that has a control terminal connected to an output of the differential amplifier, a first transistor connected between the control terminal of the drive transistor and a first power supply terminal and a second transistor connected between the control terminal of the drive transistor and a second power supply terminal, wherein a control terminal of the first transistor and a control terminal of the second transistor are connected to a first control signal and a second control signal, respectively, the first transistor being on-off controlled by the first control signal and the second transistor being on-off controlled by the second control signal.

1 . A regulator comprising;
 a differential amplifier including a differential input stage that differentially receives a reference voltage and an output terminal voltage of the regulator;   a drive transistor that has an output connected to an output terminal of the regulator and that has a control terminal connected to an output of the differential amplifier;   a first transistor connected between the control terminal of the drive transistor and a first power supply terminal; and   a second transistor connected between the control terminal of the drive transistor and a second power supply terminal, wherein   a control terminal of the first transistor and a control terminal of the second transistor are connected to a first control signal and a second control signal, respectively, the first transistor being on-off controlled by the first control signal and the second transistor being on-off controlled by the second control signal.   
     
     
         2 . A semiconductor device comprising:
 a regulator as set forth in  claim 1 ; and   a memory block including:   a precharge circuit that performs precharging of a bit line; and   a sense amplifier that is connected to the bit line, the regulator supplying a power supply voltage to the memory block, wherein   the first control signal is activated to turn on the first transistor, in response to a start of the precharging of the bit line, and   the second control signal is activated to turn on the second transistor, in response to a start of latching of a sensed value by the sense amplifier.   
     
     
         3 . The regulator according to  claim 1 , wherein the first and second control signals are controlled so as not to be set active simultaneously. 
     
     
         4 . The semiconductor device according to  claim 2 , wherein the first and second control signals are controlled so as not to be set active simultaneously. 
     
     
         5 . The semiconductor device according to  claim 2 , wherein the memory block comprises a flash memory. 
     
     
         6 . The semiconductor device according to  claim 2 , wherein the memory block comprises a dynamic random access memory.