Gaas integrated circuit device and method of attaching same
Abstract
A gallium arsenide (GaAs) integrated circuit device is provided. The GaAs circuit device has a GaAs substrate with a copper contact layer for making electrical ground contact with a pad of a target device. Although copper is known to detrimentally affect GaAs devices, the copper contact layer is isolated from the GaAs substrate using a barrier layer. The barrier layer may be, for example, a layer of nickel vanadium (NiV). This nickel vanadium (NiV) barrier protects the gallium arsenide substrate from the diffusion effects of the copper contact layer. An organic solder preservative may coat the exposed copper to reduce oxidation effects. In some cases, a gold or copper seed layer may be deposited on the GaAs substrate prior to depositing the copper contact layer.
Claims
exact text as granted — not AI-modified1 . A GaAs integrated circuit device, comprising:
a GaAs substrate having a contact side; a copper contact layer coupled to the contact side of the GaAs substrate, the copper contact layer sized to match a target pad on a surface of a printed circuit board such that the target pad provides limited or no overflow of solder beyond the copper contact layer along a plane parallel to a surface of the copper contact layer adjacent the printed circuit board; and a barrier layer deposited between the cooper contact layer and the GaAs substrate.
2 . The GaAs integrated circuit device according to claim 1 wherein the barrier layer contacts the GaAs substrate.
3 . The GaAs integrated circuit device according to claim 2 wherein the barrier layer comprises a layer of NiV, wherein the layer of NiV is about 500 Angstroms to about 2000 Angstroms thick.
4 . The GaAs integrated circuit device according to claim 1 further comprising a metal seed layer deposited between the barrier layer and the copper contact layer.
5 . The GaAs integrated circuit device according to claim 4 wherein the metal seed layer comprises copper.
6 . The GaAs integrated circuit device according to claim 1 further comprising a via extending through the GaAs substrate, and wherein the copper contact layer is coupled to the walls of the via.
7 . The GaAs integrated circuit device according to claim 1 further comprising a via extending through the GaAs substrate, and wherein the copper contact layer substantially fills the via.
8 . The GaAs integrated circuit device according to claim 1 wherein the copper contact layer is about 1 to about 40 microns thick.
9 . The GaAs integrated circuit device according to claim 1 further comprising a protective layer disposed on the copper contact layer.
10 . A method for constructing a GaAs integrated circuit device, comprising:
providing a GaAs substrate; depositing a barrier layer on the GaAs substrate; depositing a metal seed layer over the barrier layer; depositing a copper contact layer over the metal seed layer, depositing a protective layer over the copper contact layer; soldering the copper contact layer to a printed circuit board surface having a target pad; and wherein the copper contact layer is sized to match the target pad such that the target pad provides limited or no overflow of solder beyond the copper contact layer.
11 . The method according to claim 10 wherein depositing a barrier layer on the GaAs substrate comprises depositing a NiV barrier layer on the GaAs substrate; wherein depositing a metal seed layer over the barrier layer comprises depositing a copper metal or gold metal seed layer over the barrier layer.
12 . The method according to claim 10 further comprising the step of depositing the copper contact layer on the walls of a via in the GaAs substrate.
13 . The method according to claim 10 further comprising the step of depositing copper to substantially fill a via in the GaAs substrate.
14 . A circuit device incorporating a GaAs integrated circuit device, comprising:
a copper contact layer on the GaAs integrated circuit device; a contact pad on the circuit device sized just large enough to receive the copper contact layer, the contact pad not having an area for receiving adhesive overflow; and solder mechanically and electrically coupling the copper contact layer to the contact pad.
15 . The circuit device according to claim 14 wherein the solder is about 10 microns thick.
16 . The circuit device according to claim 14 wherein the solder is selected to efficiently transfer heat from the GaAs integrated circuit device to the contact pad.Join the waitlist — get patent alerts
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