Method of Fabricating a Semiconductor Device
Abstract
The present invention discloses a method of fabricating a semiconductor memory device including forming sequentially a gate insulating layer and a first conductive pattern on a semiconductor substrate; forming a protective layer on surfaces of the first conductive pattern and the gate insulating layer; performing an etching process to form a trench, the etching process being performed such that the protective layer remains on side walls of the first conductive pattern to form a protective pattern; forming an isolation layer in the trench; etching the isolation layer; removing the protective pattern above a surface of the isolation layer; and forming sequentially a dielectric layer and a second conductive layer on surfaces of the isolation layer, the protective pattern and the first conductive pattern.
Claims
exact text as granted — not AI-modified1 . A method of fabricating a semiconductor memory device, the method comprising: sequentially forming a gate insulating layer and a first conductive pattern on a semiconductor substrate;
forming a protective layer along surfaces of the first conductive pattern and the gate insulating layer; performing an etching process to form a trench and a gate insulating pattern such that the protective layer remains on side walls of the first conductive pattern to form a protective pattern; forming an isolation layer in the trench; etching the isolation layer to a level below the top surface of the first conductive pattern, and the protective layer of side walls of the first conductive pattern to expose a portion of the protective layer; removing the portion of the protective pattern above a surface of the isolation layer; and sequentially forming a dielectric layer and a second conductive layer on surfaces of the isolation layer, the protective pattern and the first conductive pattern.
2 . The method of fabricating a semiconductor memory device of claim 1 , wherein sequentially forming the gate insulating layer and the first conductive pattern on the semiconductor substrate comprises:
forming a gate insulating layer on the semiconductor substrate; forming a first conductive layer on the gate insulating layer; and patterning the first conductive layer to form the first conductive pattern on the gate insulating layer.
3 . The method of fabricating a semiconductor memory device of claim 2 , comprising forming the first conductive layer by sequentially laminating an undoped polysilicon layer and a doped polysilicon layer.
4 . The method of fabricating a semiconductor memory device of claim 1 , comprising forming the second conductive layer of a doped polysilicon layer.
5 . The method of fabricating a semiconductor memory device of claim 1 , comprising forming the protective layer of a nitride layer.
6 . The method of fabricating a semiconductor memory device of claim 5 , comprising forming the nitride layer using a deposition process or a nitrification process.
7 . The method of fabricating a semiconductor memory device of claim 1 , further comprising performing an oxidation process after the trench is formed to compensate for damage to a surface of the trench.
8 . The method of fabricating a semiconductor memory device of claim 1 , comprising forming the protective layer to a thickness in a range of 50 Å to 100 Å.
9 . The method of fabricating a semiconductor memory device of claim 1 , comprising etching the isolation layer is to a level above the top surface of the gate insulating layer to prevent the gate insulating layer from being exposed.
10 . The method of fabricating a semiconductor memory device of claim 1 , comprising removing the portion of the protective pattern above a surface of the isolation layer by a dry etching process or a wet etching process.
11 . The method of fabricating a semiconductor memory device of claim 10 , wherein the wet etching process is performed by utilizing phosphoric acid (H 3 PO 4 ) solution as an etchant.
12 . The method of fabricating a semiconductor memory device of claim 1 , further comprising performing an oxidation process after performing the etching process to form a trench.Join the waitlist — get patent alerts
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