Semiconductor integrated circuit device
Abstract
A semiconductor integrated circuit device includes: a memory cell array composed of electrically rewritable memory cells; an internal voltage generating circuit having a boosting circuit for generating a voltage boosted from a supply voltage, and a voltage detecting circuit for detecting an output voltage of the boosting circuit as a monitor voltage and controlling on/off of the boosting circuit for holding the output voltage of the boosting circuit at a specified level, the internal voltage generating circuit outputting the output voltage of the boosting circuit as an internal voltage; a control circuit for controlling the internal voltage generating circuit; and a writing circuit for applying the internal voltage to the memory cell as a writing voltage when writing data into the memory cell, wherein the control circuit controls the internal voltage to a first voltage necessary for writing data into the memory cell when writing data into the memory cell, and to a second voltage lower than the first voltage in a write verify operation following the data write operation.
Claims
exact text as granted — not AI-modified1 . (canceled)
2 . A semiconductor integrated circuit device comprising:
a memory cell array having memory cells provided therein; an internal voltage generating circuit including a boosting circuit and a voltage detecting circuit, and outputting an internal voltage; and a control circuit executing a write sequence to the memory cell multiple times consecutively, the write sequence including a write operation and a subsequent write verify operation, the control circuit controlling the internal voltage to a first voltage during the write operation, and controlling the internal voltage to a second voltage during the write verify operation, the second voltage being lower than the first voltage, and a difference between the first and second voltages being constant for each write sequence.
3 . The semiconductor integrated circuit device according to claim 2 , wherein
the voltage detecting circuit detects an output voltage of the boosting circuit to hold the output voltage of the boosting circuit at a certain level, and the internal voltage generating circuit outputs the output voltage of the boosting circuit as the internal voltage.
4 . The semiconductor integrated circuit device according to claim 2 , wherein the voltage detecting circuit includes a dividing circuit of variable voltage dividing ratio having resistances connected in series between an output terminal for outputting the output voltage of the boosting circuit and the ground, and the output of the dividing circuit is a monitor voltage.
5 . The semiconductor integrated circuit device according to claim 2 , wherein the control circuit increases the first voltage more in a subsequent write sequence than in the previous write sequence.
6 . The semiconductor integrated circuit device according to claim 5 , wherein a certain write sequence includes two or more of the write verify operations.
7 . The semiconductor integrated circuit device according to claim 2 , wherein the internal voltage generating circuit is activated from start to finish of the writing sequence.
8 . The semiconductor integrated circuit device according to claim 4 , wherein
the control circuit outputs a parameter to the dividing circuit for determining the dividing ratio, and the dividing circuit includes a plurality of switching elements for determining the dividing ratio, and the plurality of switching elements are turned on or off by the parameter given from the control circuit to vary the dividing ratio, thereby controlling the first and second voltages variably.Join the waitlist — get patent alerts
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