Pixel structure

Abstract

A pixel structure includes a substrate, a gate and a pixel electrode that are disposed on the substrate, a patterned dielectric layer and a patterned semiconductor layer disposed on the gate, a source and a drain disposed on two sides of the patterned semiconductor layer respectively, and a passivation layer disposed on the source, the drain and the semiconductor layer. The sidewall surfaces of the source and the drain are completely covered with the passivation layer, but a part of the pixel electrode is exposed by the passivation layer.

1 . A pixel structure, comprising:
 a substrate;   a gate and a pixel electrode, disposed on the substrate;   a patterned dielectric layer and a patterned semiconductor layer, disposed on the gate;   a source and a drain disposed on two sides of the patterned semiconductor layer respectively; and   a passivation layer disposed on the source, the drain and the semiconductor layer, the passivation layer completely covering sidewall surfaces of the source and the drain and exposing a part of the pixel electrode.   
     
     
         2 . The pixel structure of  claim 1 , wherein the passivation layer is at least 0.5 μm wider than the source or the drain. 
     
     
         3 . The pixel structure of  claim 1 , wherein the drain covers a part of surface of the pixel electrode. 
     
     
         4 . The pixel structure of  claim 1 , wherein the gate comprises a transparent conductive layer and a metal layer disposed on the transparent conductive layer. 
     
     
         5 . The pixel structure of  claim 1 , further comprising a channel passivation layer disposed on the semiconductor layer.