Method for Fabricating Array-Molded Package-on-Package
Abstract
An improved semiconductor device package is manufactured by attaching semiconductor chips ( 130 ) on an insulating substrate ( 101 ) having contact pads ( 103 ). A mold is provided, which has a top portion ( 210 ) with metal protrusions ( 202 ) at locations matching the pad locations. The protrusions are shaped as truncated cones. The substrate and the chips are loaded onto the bottom mold portion ( 310 ); the mold is closed by clamping the top portion onto the bottom portion so that the protrusions approach the contact pads. Encapsulation compound is introduced into the cavity and the protrusions create apertures through the encapsulation compound towards the pad locations.
Claims
exact text as granted — not AI-modified1 . A method for fabricating a semiconductor device comprising introducing a molding compound into a cavity to form a encapsulation body covering a semiconductor chip and linear arrays of contact pads adjacent to the chip, leaving a conical aperture in the encapsulation body over each contact pad corresponding to a conical protrusion in the cavity and leaving a layer of the molding compound of a first thickness between each contact pad and the corresponding conical aperture in the encapsulation body over the contact pad.
2 . The method of claim 1 , further comprising removing the layer of molding compound of the first thickness between each contact pad and the corresponding conical aperture over the contact pad.
3 . The method of claim 2 , in which the removal is performed using a laser.
4 . The method of claim 2 , in which the removing step comprises a plasma cleanup process.
5 . The method of claim 2 , in which the removing step comprises a chemical etch process.
6 . The method of claim 2 , in which the semiconductor chip is disposed on a substrate.
7 . The method of 6 , in which the molding compound covers a first surface of the substrate on which the semiconductor chip is disposed and does not cover a second surface opposite the first surface.
8 . The method of claim 7 , in which a plurality of similar semiconductor chip are disposed on the first surface of the substrate.
9 . The method of claim 8 , further comprising a step of sawing the substrate along saw lines thus singulating the semiconductor chips.
10 . The method of claim 9 , in which the sawing cuts the substrate and the encapsulating body.
11 . The method of claim 2 , further comprising filling the apertures with solder material.
12 . The method of claim 11 , further comprising connecting a packaged second semiconductor device to the solder material.
13 . The method of claim 12 , further comprising connecting solder material to the second surface of the substrate.Join the waitlist — get patent alerts
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