Semiconductor device with metal carrier and manufacturing method

Abstract

Semiconductor device including a metal carrier substrate. Above the carrier substrate a first semiconductor layer of Al x1 Ga y1 In z1 N (x1+y1+z1=1, x1≧0, y1≧0, z1≧0) is formed. A second semiconductor layer of Al x2 Ga y2 In z2 N (x2+y2+z2=1, x2>x1, y2≧0, z2≧0) is arranged on the first semiconductor layer and a gate region is arranged on the second semiconductor layer. The semiconductor device furthermore includes a source region and a drain region, wherein one of these regions is electrically coupled to the metal carrier substrate and includes a conductive region extending through the first semiconductor layer.

1 . A semiconductor device, comprising
 a carrier substrate including metal;   a first semiconductor layer of Al x1 Ga y1 In z1 N (x1+y1+z1=1, x1≧0, y1≧0, z1≧0) above the carrier substrate;   a second semiconductor layer of Al x2 Ga y2 In z2 N (x2+y2+z2=1, x2>x1, y2≧0, z2≧0) on the first semiconductor layer;   a gate region on the second semiconductor layer; and   a source region and a drain region, wherein one of these regions is electrically coupled to the carrier substrate and includes a conductive region extending through the first semiconductor layer.   
     
     
         2 . The semiconductor device of  claim 1 , further comprising
 a third semiconductor layer including MN between the carrier substrate and the first semiconductor layer.   
     
     
         3 . The semiconductor device of  claim 1 , further comprising
 a third semiconductor layer including Al x3 Ga y3 In z3 N (x 3 +y 3 +z3=1, x2>x 3 , y3≧0, z3≧0) between the carrier substrate and the first semiconductor layer and in contact with the first semiconductor layer, the third semiconductor layer including an average concentration of dopants higher than 10 17  cm −3 .   
     
     
         4 . The semiconductor device of  claim 1 , wherein
 the carrier substrate is made of Cu.   
     
     
         5 . The semiconductor device of  claim 1 , wherein
 the conductive region includes a metal.   
     
     
         6 . The semiconductor device of  claim 1 , wherein
 a distance between the gate region and the drain region along a lateral direction extending parallel to an interface between the first and second semiconductor layers is larger than a thickness of the first semiconductor layer along a vertical direction extending perpendicular to the interface.   
     
     
         7 . The semiconductor device of  claim 1 , wherein
 both the source region and the drain region include doped semiconductor regions of a same conductivity type within the first semiconductor layer, an average concentration of dopants within each of these regions being higher than 10 17  cm −3 .   
     
     
         8 . The semiconductor device of  claim 7 , wherein
 the second semiconductor layer is formed on a first part of the first semiconductor layer including the conductive region and is absent on a second part of the first semiconductor layer including the source region.   
     
     
         9 . The semiconductor device of  claim 7 , further comprising
 a doped semiconductor region within the first semiconductor layer, wherein an average concentration of dopants of the doped semiconductor region is higher than 10 17  cm −3 , the doped semiconductor region being formed at a rear side of the first semiconductor layer and opposite to the source region at the front side of the first semiconductor layer.   
     
     
         10 . The semiconductor device of  claim 7 , further comprising
 a doped semiconductor region within the first semiconductor layer, wherein an average concentration of dopants of the doped semiconductor region is higher than 10 17  cm −3 , the doped semiconductor region overlapping a bottom side of the source region.   
     
     
         11 . The semiconductor device of  claim 1 , wherein
 the conductive region includes a doped epitaxial layer formed within an aperture of the first semiconductor layer.   
     
     
         12 . A semiconductor device, comprising
 a carrier substrate;   a first semiconductor layer of Al x1 Ga y1 In z1 N (x1+y1+z1=1, x1≧0, y1≧0, z1≧0) above the carrier substrate;   a second semiconductor layer of Al x2 Ga y2 In z2 N (x2+y2+z2=1, x2>x1, y2≧0, z2≧0) on the first semiconductor layer;   a gate region on the second semiconductor layer;   a source region and a drain region; and   a third semiconductor layer including Al x3 Ga y3 In z3 N (x 3 +y 3 +z3=1, x2>x 3 , y3≧0, z3≧0) between the carrier substrate and the first semiconductor layer and in contact with the first semiconductor layer, the third semiconductor layer including an average concentration of dopants higher than 10 17  cm −3 .   
     
     
         13 . The semiconductor device of  claim 12 , wherein
 one of the source region and the drain region is electrically coupled to the carrier substrate and includes a conductive region extending through the first semiconductor layer.   
     
     
         14 . The semiconductor device of  claim 12 , wherein
 the carrier substrate at a rear side of the semiconductor device is electrically coupled to a contact region at a front side of the semiconductor device via a lead frame and a bond wire.   
     
     
         15 . The semiconductor device of  claim 12 , wherein
 the carrier substrate includes at least one of doped Si, SiC, GaN, metal.   
     
     
         16 . The semiconductor device of  claim 12 , further comprising
 a doped semiconductor region within the first semiconductor layer, wherein an average concentration of dopants of the doped semiconductor region is higher than 10 17  cm −3 , the doped semiconductor region being formed at a rear side of the first semiconductor layer opposite to the source region at a front side of the first semiconductor layer.   
     
     
         17 . The semiconductor device of  claim 12 , further comprising
 a doped semiconductor region within the first semiconductor layer, wherein an average concentration of dopants of the doped semiconductor region is higher than 10 17  cm −3 , the doped semiconductor region overlapping a bottom side of the source region.   
     
     
         18 . The semiconductor device of  claim 12 , wherein
 a distance between the gate region and the drain region along a lateral direction extending parallel to an interface between the first and second semiconductor layers is larger than a thickness of the first semiconductor layer along the vertical direction extending perpendicular to the interface.   
     
     
         19 . The semiconductor device of  claim 12 , wherein
 the conductive region includes a doped epitaxial layer formed within an aperture of the first semiconductor layer.   
     
     
         20 . The semiconductor device of  claim 12 , wherein
 the first semiconductor layer includes at least one of Fe, C, Mg.   
     
     
         21 . A method for manufacturing a semiconductor device, comprising:
 attaching a front side of a semiconductor body to a first carrier, the semiconductor body including, in a sequence from a rear side to the front side, a semiconductor carrier substrate, a buffer layer including MN, a first semiconductor layer of Al x1 Ga y1 In z1 N (x1+y1+z1=1, x1≧0, y1≧0, z1≧0) and a second semiconductor layer of Al x2 Ga y2 In z2 N (x2+y2+z2=1, x2>x1, y2≧0, z2≧0);   removing the semiconductor carrier substrate from the rear side;   forming a metal substrate carrier on the rear side.   
     
     
         22 . The method of  claim 21 , wherein
 forming the metal substrate carrier includes   forming a seed layer of Cu on the rear side; and   forming Cu on the rear side by galvanic plating.   
     
     
         23 . The method of  claim 21 , wherein
 the semiconductor body comprises a third semiconductor layer including Al x3 Ga y3 In z3 N (x 3 +y 3 +z3=1, x2>x 3 , y3≧0, z3≧0) between the carrier substrate and the first semiconductor layer and in contact with the first semiconductor layer, the third semiconductor layer including an average concentration of dopants higher than 10 17  cm −3 ; the method further comprising   removing the buffer layer after removal of the semiconductor carrier and before formation of the metal substrate carrier.   
     
     
         24 . The method of  claim 21 , further comprising
 forming an aperture at least within the first semiconductor layer; and   forming a conductive material within the aperture.   
     
     
         25 . The method of  claim 22 , wherein
 forming the conductive material within the aperture includes forming a doped epitaxial semiconductor layer within the aperture.