Semiconductor Device with Improved Contacts
Abstract
A device with a solder joint made of a copper contact pad ( 210 ) of certain area ( 202 ) and an alloy layer ( 301 ) metallurgically attached to the copper pad across the pad area. The alloy layer contains copper/tin alloys, which include Cu 6 Sn 5 intermetallic compound, and nickel/copper/tin alloys, which include (Ni,Cu) 6 Sn 5 intermetallic compound. A solder element ( 308 ) including tin is metallurgically attached to the alloy layer across the pad area. No fraction of the original thin nickel layer is left after the reflow process. Copper/tin alloys help to improve the drop test performance, nickel/copper/tin alloys help to improve the life test performance.
Claims
exact text as granted — not AI-modified1 . A method of fabricating a semiconductor device, comprising:
depositing a nickel layer on a copper contact pad on a surface of a substrate to which a semiconductor chip is affixed; depositing a tin-containing solder layer on the nickel layer; dissolving the entire nickel layer at an elevated temperature forming an alloy layer; and the alloy layer contacting the copper contact pad on one side and the solder layer on the opposite side.
2 . The method of claim 1 , further comprising depositing a gold layer between the nickel layer and the solder layer.
3 . The method of claim 2 , further comprising dissolving the gold layer into the alloy layer.
4 . The method of claim 1 , further comprising depositing a palladium layer between the nickel layer and the solder layer.
5 . The method of claim 4 , further comprising dissolving the palladium layer into the alloy layer.
6 . The method of claim 1 , in which the alloy layer includes copper/tin alloys and copper/nickel/tin alloys.
7 . The method of claim 6 , in which the copper/nickel/tin alloys include (Cu, Ni, Au) 6 Sn 5 intermetallic compound.
8 . The method of claim 6 , in which the copper/tin alloys include Cu 6 Sn 5 intermetallic compound.
9 . The method of claim 1 , in which the substrate includes a solder mask window over the copper contact pad, defining a substrate contact.
10 . The method of claim 9 , in which the alloy layer is confined to the substrate contact.
11 . The method of claim 1 , in which the alloy layer is disposed on a first substrate surface opposite a second substrate surface on which the semiconductor chip is affixed.
12 . The method of claim 11 , in which the second substrate surface is free of solder material.
13 . The method of claim 11 , in which the semiconductor chip is affixed to the second substrate surface via bond wires.
14 . The method of claim 13 , in which the bond wires include gold.Join the waitlist — get patent alerts
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