Method of fabricating semiconductor device

Abstract

A method of fabricating a semiconductor device includes forming a gate insulating film on a semiconductor substrate, forming a first conductive layer on the gate insulating film, forming an intergate insulating film on the first conductive layer, forming a second conductive layer on the intergate insulating film, dividing the conductive layers and the intergate insulating film with a mask pattern formed on the second conductive layer, thereby forming a plurality of gate electrodes, forming a first recess on a first side wall of the first conductive layer and a second recess on a second side wall of the second conductive layer with side surfaces of the gate electrodes being exposed, and burying insulating films between the gate electrodes respectively and forming air gap portions respectively in portions of the buried insulating films corresponding to the recesses.

1 . A method of fabricating a semiconductor device, comprising:
 forming a gate insulating film on a semiconductor substrate;   forming a first conductive layer, as a floating gate electrode, on the gate insulating film so that a vertically intermediate portion of the first conductive layer has a higher dopant concentration than vertically upper and lower portions of the first conductive layer;   forming an intergate insulating film on the first conductive layer;   forming a second conductive layer, as a control gate electrode, on the intergate insulating film so that a vertically intermediate portion of the second conductive layer has a higher dopant concentration than vertically upper and lower portions of the second conductive layer;   dividing the first and second conductive layers and the intergate insulating film with a mask pattern formed on the second conductive layer, thereby forming a plurality of gate electrodes;   forming a first recess on a first side wall of the first conductive layer and a second recess on a second side wall of the second conductive layer with side surfaces of the gate electrodes being exposed; and   burying insulating films between the gate electrodes respectively and forming air gap portions respectively in portions of the buried insulating films corresponding to the first and the second recesses.   
     
     
         2 . The method according to  claim 1 , wherein the first conductive layer includes a first polycrystalline silicon layer and the second conductive layer includes a second polycrystalline silicon layer. 
     
     
         3 . The method according to  claim 2 , wherein the dopant introduced into the first and second polycrystalline silicon layers is phosphor (P). 
     
     
         4 . The method according to  claim 1 , wherein the first recess is formed from an upper edge portion to a lower edge portion of the first side wall and the second recess is formed from an upper edge portion to a lower edge portion of the second side wall. 
     
     
         5 . The method according to  claim 1 , wherein forming the first and the second recesses includes forming a first oxide film on the first side wall and a second oxide film on the second side wall by a thermal oxidation treatment, and selectively removing the first and the second oxide films with use of a chemical solution. 
     
     
         6 . The method according to  claim 5 , wherein the first oxide film is formed from an upper edge portion to a lower edge portion of the first side wall and the second oxide film is formed from an upper edge portion to a lower edge portion of the second side wall. 
     
     
         7 . The method according to  claim 6 , wherein a thickness of a middle portion between the upper and the lower edge portions of the first oxide film is larger than a thickness of the upper and the lower edge portions of the first oxide film and a thickness of a middle portion between the upper and the lower edge portions of the second oxide film is larger than a thickness of the upper and the lower edge portions of the second oxide film. 
     
     
         8 . The method according to  claim 1 , wherein forming the first and the second recesses includes etching the first and the second side walls by reactive ion etching (RIE) method. 
     
     
         9 . A method of fabricating a semiconductor device, comprising:
 forming a gate insulating film on a semiconductor substrate;   forming a first conductive layer on the gate insulating film by forming a first undoped amorphous silicon layer on the gate insulating film, forming a first amorphous silicon layer doped with phosphor on the first undoped amorphous silicon layer and forming a second undoped amorphous silicon layer on the first amorphous silicon layer;   forming an intergate insulating film on the first conductive layer;   forming a second conductive layer on the intergate insulating film by forming a third undoped amorphous silicon layer on the intergate insulating film, forming a second amorphous silicon layer doped with phosphor on the third undoped amorphous silicon layer and forming a fourth undoped amorphous silicon layer on the second amorphous silicon layer;   dividing the first and second conductive layers and the intergate insulating film with a mask pattern formed on the second conductive layer, thereby forming a plurality of gate electrodes;   forming a first recess on a first side wall of the first conductive layer and a second recess on a second side wall of the second conductive layer with side surfaces of the gate electrodes being exposed; and   burying insulating films between the gate electrodes respectively and forming air gap portions respectively in portions of the buried insulating films corresponding to the first and the second recesses.   
     
     
         10 . The method according to  claim 9 , wherein the first recess is formed from an upper edge portion to a lower edge portion of the first side wall and the second recess is formed from an upper edge portion to a lower edge portion of the second side wall. 
     
     
         11 . The method according to  claim 9 , wherein forming the first and the second recesses includes forming a first oxide film on the first side wall and a second oxide film on the second side wall by a thermal oxidation treatment, and selectively removing the first and the second oxide films with use of a chemical solution. 
     
     
         12 . The method according to  claim 11 , wherein the first oxide film is formed from an upper edge portion to a lower edge portion of the first side wall and the second oxide film is formed from an upper edge portion to a lower edge portion of the second side wall. 
     
     
         13 . The method according to  claim 12 , wherein a thickness of a middle portion between the upper and the lower edge portions of the first oxide film is larger than a thickness of the upper and the lower edge portions of the first oxide film and a thickness of a middle portion between the upper and the lower edge portions of the second oxide film is larger than a thickness of the upper and the lower edge portions of the second oxide film. 
     
     
         14 . The method according to  claim 9 , wherein forming the first and the second recesses includes etching the first and the second side walls by reactive ion etching (RIE) method.