US2011082957A1PendingUtilityA1

Slave device for an iic bus communication system capable of supressing freeze of iic bus communication

Assignee: PANASONIC CORPPriority: Nov 15, 2005Filed: Nov 30, 2010Published: Apr 7, 2011
Est. expiryNov 15, 2025(expired)· nominal 20-yr term from priority
G06F 13/4291
44
PatentIndex Score
0
Cited by
0
References
0
Claims

Abstract

Multiple master devices and multiple slave devices are connected in parallel to two bus lines including a SCL line 1 and a SDA line 2 , and a pullup resistor is connected between the bus lines and a power source. A state detector detects a frozen state on the basis of the states of the SCL line and SDA line and outputs a freeze detection signal, and it detects a freeze released state so as to output a freeze-release detection signal. A pulse generator supplies a pulse signal corresponding to a clock signal to the SCL line in accordance with the freeze-release detection signal. A reset signal generator sends a reset signal to the multiple master devices in accordance with the freeze-release detection signal. The multiple master devices return to the normal communication state in accordance with the supply of the reset signal. It is possible to restore the system even when the slave device returns an acknowledge signal for an incorrect bit and the IIC bus communication freezes.

Claims

exact text as granted — not AI-modified
1 .- 4 . (canceled) 
     
     
         5 . A slave device for an IIC bus communication system, the slave device comprising:
 a SCL terminal to be connected to a SCL line of the IIC bus communication system;   a SDA terminal to be connected to a SDA line of the IIC bus communication system;   a SCL comparator for outputting a result of comparison between a SCL signal inputted via the SCL terminal and a reference voltage; and   a decoder to be supplied with outputs from the SCL comparator and the SDA comparator,   wherein at least one of the SCL comparator and the SDA comparator is a hysteretic comparator.   
     
     
         6 . The slave device according to  claim 5 , wherein a capacitor for noise rejection is connected to the output side of at least one of the SCL comparator and the SDA comparator. 
     
     
         7 . The slave device according to  claim 5 , wherein the reference voltage to be supplied to at least one of the SCL comparator and the SDA comparator is supplied from a reference voltage source other than the reference voltage source that supplies a reference voltage to the decoder. 
     
     
         8 . The slave device according to  claim 5 , comprising:
 a power source input terminal to be connected to a power source; and voltage-division resistors connected between the power source input terminal and a ground,   wherein a voltage obtained by dividing the voltage of the power source by the resistors is used as the reference voltage to be supplied to at least one of the SCL comparator and the SDA comparator.   
     
     
         9 . The slave device according to  claim 5 , further comprising a buffer circuit at the output side of at least one of the SCL comparator and the SDA comparator in order to lower output impedance. 
     
     
         10 - 17 . (canceled)

Join the waitlist — get patent alerts

Track US2011082957A1 — get alerts on status changes and closely related new filings.

We store only your email — no account needed. See our privacy policy.