US2011079910A1PendingUtilityA1
Dual metal interconnects for improved gap-fill, reliability, and reduced capacitance
Est. expiryDec 10, 2028(~2.4 yrs left)· nominal 20-yr term from priority
H10P 14/46H10W 20/4441H10W 20/4432H10W 20/4421H10W 20/4405H10W 20/056H10W 20/42H10W 20/4437H10W 20/057H10P 14/40H10D 64/011
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Claims
Abstract
Embodiments of apparatus and methods for forming dual metal interconnects are described herein. Other embodiments may be described and claimed.
Claims
exact text as granted — not AI-modified1 . A device comprising:
a dielectric layer positioned between a first metal layer and a second metal layer, a refractory metal interconnect in the dielectric layer wherein at least a portion of the refractory metal interconnect is positioned on and directly adjacent to the first metal layer, and wherein the refractory interconnect may contain boron or phosphorous or a combination of boron and phosphorus to impart amorphous properties to the refractory interconnect, and wherein the refractory metal interconnect couples the first metal layer to the second metal layer.
2 . The device of claim 1 , further comprising a barrier layer between the refractory metal interconnect and the second metal layer.
3 . The device of claim 1 , wherein the refractory interconnect substantially fills a via in the dielectric layer.
4 . The device of claim 3 , wherein the refractory intereconnect is formed by electrolessly depositing on the first metal layer.
5 . The device of claim 4 , wherein the refractory material comprises at least one of cobalt (Co), nickel (Ni), palladium (Pd), platinum (Pt), tungsten (W), ruthenium (Ru), and alloys thereof.
6 . The device of claim 3 , wherein the via is a high aspect ratio feature with an aspect ratio at or above 3:1.
7 . The device of claim 3 , wherein the refractory metal interconnect is positioned directly adjacent to the dielectric layer.
8 . A system, comprising:
a device comprising a dielectric layer positioned between a first metal layer and a second metal layer, a refractory metal interconnect in the dielectric layer wherein at least a portion of the refractory metal interconnect is positioned on and directly adjacent to the first metal layer, and wherein the refractory interconnect may contain boron or phosphorous or a combination of boron and phosphorus to impart amorphous properties to the refractory interconnect, and wherein the refractory metal interconnect couples the first metal layer to the second metal layer; a processor; and a networking interface.
9 . The system of claim 8 , wherein the refractory metal interconnect is positioned directly adjacent to the dielectric layer in the device.
10 . The system of claim 9 , wherein the refractory interconnect substantially fills a via in the dielectric layer.
11 . A device comprising a dual metal interconnect formed by:
depositing a dielectric layer over a patterned metal layer, etching the dielectric layer to form a trench directly adjacent to an via to form a pathway from a top surface of the dielectric layer to the patterned metal layer to expose an underlying metal surface of the patterned metal layer, forming a refractory metal interconnect in the via, wherein the refractory interconnect may contain boron or phosphorous or a combination of boron and phosphorus to impart amorphous properties to the refractory interconnect, wherein the refractory metal interconnect is formed directly adjacent to the underlying metal surface and a wall of the via to substantially fill the via, depositing a barrier layer on and directly adjacent to a surface of the trench and the refractory metal interconnect, and forming a second metal on the barrier layer.
12 . The device of claim 11 , further comprising forming the refractory metal interconnect by electroless deposition.
13 . The device of claim 12 , wherein electrolessly depositing the refractory metal interconnect comprises electrolessly depositing refractory material selected from the group comprising cobalt (Co), nickel (Ni), palladium (Pd), platinum (Pt), tungsten (W), ruthenium (Ru), and alloys thereof.
14 . The device of claim 11 , further including pretreating the via and the underlying metal surface.
15 . The device of claim 14 , wherein pretreating the via comprises using argon (Ar) ion bombardment or a plasma process formed using a mixture of hydrogen (H 2 ) and helium (He) or a mixture of H 2 and Ar.
16 . The device of claim 11 , wherein the refractory metal interconnect is not formed using a physical vapor deposition (PVD) or an atomic layer deposition (ALD) process.
17 . The device of claim 11 , wherein the refractory metal interconnect is formed using a process that does not form a seam in the refractory metal interconnect.
18 . The device of claim 11 , wherein the via is a high aspect ratio feature with an aspect ratio at or above 3:1.
19 . The device of claim 11 , wherein the dielectric layer is formed from a low-k dielectric material.
20 . The device of claim 11 , wherein a nominal width of the refractory metal interconnect is substantially equal to or larger than 50 nanometers (nm).Join the waitlist — get patent alerts
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