Hardware for parallel command list generation

Abstract

A method for providing state inheritance across command lists in a multi-threaded processing environment. The method includes receiving an application program that includes a plurality of parallel threads; generating a command list for each thread of the plurality of parallel threads; causing a first command list associated with a first thread of the plurality of parallel threads to be executed by a processing unit; and causing a second command list associated with a second thread of the plurality of parallel threads to be executed by the processing unit, where the second command list inherits from the first command list state associated with the processing unit.

1 . A method for providing state inheritance across command lists in a multi-threaded processing environment, the method comprising:
 receiving an application program that includes a plurality of parallel threads;   generating a command list for each thread of the plurality of parallel threads;   causing a first command list associated with a first thread of the plurality of parallel threads to be executed by a processing unit; and   causing a second command list associated with a second thread of the plurality of parallel threads to be executed by the processing unit, wherein the second command list inherits from the first command list state associated with the processing unit.   
     
     
         2 . The method of  claim 1 , wherein the first command list includes tokens that alternate between methods in a command buffer written during command list construction and methods in a patch method buffer written during submission of the command list for execution. 
     
     
         3 . The method of  claim 2 , wherein each token comprises a pointer to a memory unit configured to store commands to be executed by the processing unit. 
     
     
         4 . The method of  claim 2 , wherein index size is a parameter of the state associated with the processing unit, and a draw command based on the index size is included in the command buffer without a corresponding patch method. 
     
     
         5 . The method of  claim 2 , wherein primitive topology is a parameter of the state associated with the processing unit, and a draw command based on the primitive topology is included in the command buffer without a corresponding patch method. 
     
     
         6 . The method of  claim 2 , wherein each shader stage in a geometry processing pipeline has an associated set of clip plane enable bits, and the processing unit is configured to use the clip plane enable bits associated with the last enabled shader stage. 
     
     
         7 . The method of  claim 1 , wherein the processing unit comprises a graphics processing unit. 
     
     
         8 . A computer-readable storage medium storing instructions that, when executed by a processor, cause a computer system to provide state inheritance across command lists in a multi-threaded processing environment, by performing the steps of:
 receiving an application program that includes a plurality of parallel threads;   generating a command list for each thread of the plurality of parallel threads;   causing a first command list associated with a first thread of the plurality of parallel threads to be executed by a processing unit; and   causing a second command list associated with a second thread of the plurality of parallel threads to be executed by the processing unit, wherein the second command list inherits from the first command list state associated with the processing unit.   
     
     
         9 . The computer-readable storage medium of  claim 8 , wherein the first command list includes tokens that alternate between methods in a command buffer written during command list construction and methods in a patch method buffer written during submission of the command list for execution. 
     
     
         10 . The computer-readable storage medium of  claim 9 , wherein each token comprises a pointer to a memory unit configured to store commands to be executed by the processing unit. 
     
     
         11 . The computer-readable storage medium of  claim 9 , wherein index size is a parameter of the state associated with the processing unit, and a draw command based on the index size is included in the command buffer without a corresponding patch method. 
     
     
         12 . The computer-readable storage medium of  claim 9 , wherein primitive topology is a parameter of the state associated with the processing unit, and a draw command based on the primitive topology is included in the command buffer without a corresponding patch method. 
     
     
         13 . The computer-readable storage medium of  claim 9 , wherein each shader stage in a geometry processing pipeline has an associated set of clip plane enable bits, and the processing unit is configured to use the clip plane enable bits associated with the last enabled shader stage. 
     
     
         14 . The computer-readable storage medium of  claim 8 , wherein the processing unit comprises a graphics processing unit. 
     
     
         15 . A computer system, comprising:
 a processor; and   a memory storing instructions that, when executed by the processor, cause the processor to providing state inheritance across command lists in a multi-threaded processing environment by performing the steps of:
 receiving an application program that includes a plurality of parallel threads, 
 generating a command list for each thread of the plurality of parallel threads, 
 causing a first command list associated with a first thread of the plurality of parallel threads to be executed by a processing unit, and 
 causing a second command list associated with a second thread of the plurality of parallel threads to be executed by the processing unit, wherein the second command list inherits from the first command list state associated with the processing unit. 
   
     
     
         16 . The computer system of  claim 15 , wherein the first command list includes tokens that alternate between methods in a command buffer written during command list construction and methods in a patch method buffer written during submission of the command list for execution. 
     
     
         17 . The computer system of  claim 16 , wherein each token comprises a pointer to a memory unit configured to store commands to be executed by the processing unit. 
     
     
         18 . The computer system of  claim 16 , wherein index size is a parameter of the state associated with the processing unit, and a draw command based on the index size is included in the command buffer without a corresponding patch method. 
     
     
         19 . The computer system of  claim 16 , wherein primitive topology is a parameter of the state associated with the processing unit, and a draw command based on the primitive topology is included in the command buffer without a corresponding patch method. 
     
     
         20 . The computer system of  claim 16 , wherein each shader stage in a geometry processing pipeline has an associated set of clip plane enable bits, and the processing unit is configured to use the clip plane enable bits associated with the last enabled shader stage.