Partially Patterned Lead Frames and Methods of Making and Using the Same in Semiconductor Packaging
Abstract
A method of making a lead frame and a partially patterned lead frame package with near-chip scale packaging lead-count, wherein the method lends itself to better automation of the manufacturing line and improved quality and reliability of the packages produced therefrom. A major portion of the manufacturing process steps is performed with a partially patterned strip of metal formed into a web-like lead frame on one side so that the web-like lead frame is also rigid mechanically and robust thermally to perform without distortion or deformation during the chip-attach and wire bond processes, both at the chip level and the package level. The bottom side of the metal lead frame is patterned to isolate the chip-pad and the wire bond contacts only after the front side, including the chip and wires, is hermetically sealed with an encapsulant. The resultant package being electrically isolated enables strip testing and reliable singulation.
Claims
exact text as granted — not AI-modified1 - 17 . (canceled)
18 . A partially patterned lead frame for use in the manufacture of an electronic package, the lead frame comprising:
a film having a top surface and a bottom surface, wherein the film is partially patterned from the top surface but not entirely through to the bottom surface, and the film is partially patterned from the bottom surface but not entirely through to the top surface, and wherein the patterning on the top surface is deeper than the patterning on the bottom surface.
19 . A chip scale package comprising one or more encapsulated computer chips, the chip scale package having a bottom surface with channels, the channels functioning as air vents.Join the waitlist — get patent alerts
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