US2011049712A1PendingUtilityA1
Wafer Level Stacked Die Packaging
Est. expiryOct 17, 2027(~1.2 yrs left)· nominal 20-yr term from priority
Inventors:Thomas M. Goida
H10W 90/756H10W 90/754H10W 90/752H10W 90/734H10W 90/732H10W 90/231H10W 74/00H10W 72/07352H10W 72/07338H10W 72/5363H10W 72/01331H10W 72/884H10W 72/536H10W 72/354H10W 72/321H10W 72/075H10W 72/073H10W 90/00
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Claims
Abstract
A stacked die package in which an adhesive pad separates a bottom die from a top die. The pad may be in the form of a wall of adhesive about a central hollow area. The bottom die is attached to a base with a low temperature curing adhesive or a snap cure adhesive.
Claims
exact text as granted — not AI-modified1 . A stacked die package comprising:
a first microelectronic semiconductor die; an adhesive pad atop the die; a second microelectronic semiconductor die affixed atop the adhesive pad; and a base on which the first microelectronic semiconductor die is attached by an adhesive that cures at a lower temperature than the adhesive in the adhesive pad.
2 . The stacked die package of claim 1 , further comprising wire bonds connected between a top surface of the first microelectronic semiconductor die and the base.
3 . The stacked die package of claim 2 , further comprising wire bonds connected between a top surface of the second microelectronic semiconductor die and the base.
4 . The stacked die package of claim 3 , further comprising nonconductive material molded over the first and second semiconductor dies.
5 . The stacked die package of claim 4 , further comprising conductive balls attached to a bottom surface of the base.
6 . The stacked die package of claim 1 , wherein the adhesive pad forms a perimeter about a hollow area centrally disposed above the die.
7 . The stacked die package of claim 6 , wherein the adhesive pad is in the shape of a rectangular wall.
8 . The stacked die package of claim 6 , wherein the adhesive pad has a width on the die and a thickness from the die to a top of the pad, wherein a ratio of the thickness to the width is at least 1:1 and the second microelectronic semiconductor die is separated from the first microelectronic semiconductor die by the wall thickness.
9 . The stacked die package of claim 1 , wherein the adhesive attaching the first microelectronic semiconductor die to the base comprises a low temperature curing adhesive, which cures at temperatures between 125° C. and 150° C.
10 . A stacked die package comprising:
a first microelectronic semiconductor die; an adhesive pad atop the die; a second microelectronic semiconductor die affixed atop the adhesive pad; and a base on which the first microelectronic semiconductor die is attached by a snap cure adhesive, which cures more quickly than the adhesive in the adhesive pad.
11 . The stacked die package of claim 10 , further comprising wire bonds connected between a top surface of the first microelectronic semiconductor die and the base.
12 . The stacked die package of claim 11 , further comprising wire bonds connected between a top surface of the second microelectronic semiconductor die and the base.
13 . The stacked die package of claim 12 , further comprising nonconductive material molded over the first and second semiconductor dies.
14 . The stacked die package of claim 13 , further comprising conductive balls attached to a bottom surface of the base.
15 . The stacked die package of claim 10 , wherein the adhesive pad forms a perimeter about a hollow area centrally disposed above the die.
16 . The stacked die package of claim 15 , wherein the adhesive pad is in the shape of a rectangular wall.
17 . The stacked die package of claim 15 , wherein the adhesive pad has a width on the die and a thickness from the die to a top of the wall, wherein a ratio of the thickness to the width is at least 1:1 and the second microelectronic semiconductor die is separated from the first microelectronic semiconductor die by the wall thickness.Join the waitlist — get patent alerts
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