US2011049473A1PendingUtilityA1
Film Wrapped NFET Nanowire
Est. expiryAug 28, 2029(~3.1 yrs left)· nominal 20-yr term from priority
Y10S977/814Y10S977/937Y10S977/932Y10S977/762B82Y 10/00Y10S977/938Y10S977/936Y10S977/825H10D 30/6757H10D 30/6748H10D 30/6735H10D 30/0321H10D 62/118
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Claims
Abstract
A semiconductor structure includes an n-channel field effect transistor (NFET) nanowire, the NFET nanowire comprising a film wrapping around a core of the NFET nanowire, the film wrapping configured to provide tensile stress in the NFET nanowire. A method of making a semiconductor structure includes growing a film wrapping around a core of an n-channel field effect transistor (NFET) nanowire of the semiconductor structure, the film wrapping being configured to provide tensile stress in the NFET nanowire.
Claims
exact text as granted — not AI-modified1 . A semiconductor structure, comprising:
an n-channel field effect transistor (NFET) nanowire, the NFET nanowire comprising a film wrapping around a core of the NFET nanowire, the film wrapping configured to provide tensile stress in the NFET nanowire.
2 . The semiconductor structure of claim 1 , further comprising a p-channel field effect transistor (PFET) nanowire.
3 . The semiconductor structure of claim 2 , wherein the PFET nanowire comprises silicon (Si).
4 . The semiconductor structure of claim 1 , wherein the NFET nanowire core comprises silicon germanium (SiGe).
5 . The semiconductor structure of claim 1 , wherein the NFET nanowire has a cross-sectional area of about 20 nanometers (nm) by about 20 nanometers or less.
6 . The semiconductor structure of claim 1 , wherein the film wrapping comprises silicon (Si).
7 . The semiconductor structure of claim 1 , wherein the film wrapping thickness is between about 1 nanometer (nm) and 2 nm.
8 . A method of making a semiconductor structure, the method comprising:
growing a film wrapping around a core of an n-channel field effect transistor (NFET) nanowire of the semiconductor structure, the film wrapping being configured to provide tensile stress in the NFET nanowire.
9 . The method of claim 8 , further comprising masking a p-channel field effect transistor (PFET) nanowire of the semiconductor structure while growing the film wrapping.
10 . The method of claim 9 , wherein the PFET nanowire comprises silicon (Si).
11 . The method of claim 8 , wherein the NFET nanowire core comprises silicon germanium (SiGe).
12 . The method of claim 8 , wherein the NFET nanowire has a cross-sectional area of about 20 nanometers (nm) by about 20 nanometers or less.
13 . The method of claim 8 , wherein the film wrapping comprises silicon (Si) of a thickness between about 1 nanometer (nm) and 2 nm.
14 . The method of claim 8 , further comprising thickening a p-channel field effect transistor (PFET) nanowire of the semiconductor structure while growing the film wrapping.Join the waitlist — get patent alerts
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