Semiconductor memory device and a method of manufacturing the same

Abstract

Disclosed herein is a semiconductor memory device, including: a first electrode formed on a substrate; an ion source layer formed on an upper layer of the first electrode; and a second electrode formed on an upper layer of the ion source layer. Resistance change type memory cells in each of which either a surface of the first electrode or a surface of the ion source layer is oxidized to form a resistance change type memory layer in an interface between the first electrode and the ion source interface are arranged in a array.

1 . A semiconductor memory device, comprising:
 a first electrode formed on a substrate;   an ion source layer formed on an upper layer of said first electrode; and   a second electrode formed on an upper layer of said ion source layer;   wherein resistance change type memory cells in each of which either a surface of said first electrode or a surface of said ion source layer is oxidized to form a resistance change type memory layer in an interface between said first electrode and said ion source interface are arranged in a array.   
     
     
         2 . The semiconductor memory device according to  claim 1 , wherein said memory layer is made of an oxide of a metal contained in said first electrode. 
     
     
         3 . The semiconductor memory device according to  claim 1 , wherein said memory layer is made of an oxide of a metal contained in said ion source layer. 
     
     
         4 . The semiconductor memory device according to  claim 1 , wherein a voltage is applied across said second electrode and said first electrode to form a current path containing one or more kinds of metallic elements in said memory layer or to form a large number of defects in said memory layer, thereby reducing a resistance value of said resistance change type memory layer. 
     
     
         5 . The semiconductor memory device according to  claim 1 , wherein said memory layer contains Al, Mg or a rare earth element. 
     
     
         6 . The semiconductor memory device according to  claim 1 , wherein said ion source layer contains at least one kind of chalcogen element of Te, S and Se. 
     
     
         7 . The semiconductor memory device according to  claim 1 , wherein said ion source layer contains at least one kind of element of Cu, Ag and Zn. 
     
     
         8 . A method of manufacturing a semiconductor memory device, comprising the steps of:
 forming a first electrode on a substrate;   forming an ion source layer on an upper layer of said first electrode; and   forming a second electrode on an upper layer of said ion source layer; and   further including the step of oxidizing either a surface of said first electrode or a surface of said ion source layer to form a resistance change type memory layer in an interface between said first electrode and said ion source layer between the step of forming said first electrode on said substrate and the step of forming said second electrode on the upper layer of said ion source layer;   wherein said resistance change type memory cells are arranged in an array, thereby structuring said semiconductor memory device.   
     
     
         9 . The method of manufacturing a semiconductor memory device according to  claim 8 , wherein in the step of forming said resistance change type memory layer, a surface of said first electrode is oxidized to form said resistance change type memory layer made of an oxide of a metal containing said first electrode. 
     
     
         10 . The method of manufacturing a semiconductor memory device according to  claim 8 , wherein in the step of forming said resistance change type memory layer, a surface of said ion source layer is oxidized to form said resistance change type memory layer made of an oxide of a metal containing said ion source layer. 
     
     
         11 . The method of manufacturing a semiconductor memory device according to  claim 10 , further comprising the step of:
 oxidizing a surface of said first electrode to form an oxide layer between the step of forming said first electrode on said substrate, and the step of forming said ion source layer on the upper layer of said first electrode;   wherein in the step of forming said resistance change type memory layer, oxygen is diffused from said oxide layer by carrying out a thermal treatment to oxidize a surface of said ion source layer, forming said resistance change type memory layer made of an oxide of a metal contained in said ion source layer.   
     
     
         12 . The method of manufacturing a semiconductor memory device according to  claim 8 , wherein in the step of forming said resistance change type memory layer, said resistance change type memory layer containing Al, Mg or a rare earth element is formed. 
     
     
         13 . The method of manufacturing a semiconductor memory device according to  claim 8 , wherein in the step of forming said ion source layer, said ion source layer containing at least one kind of chalcogen element of Te, S and Se is formed. 
     
     
         14 . The method of manufacturing a semiconductor memory device according to  claim 8 , wherein in the step of forming said ion source layer, said ion source layer containing at least one kind of element of Cu, Ag and Zn is formed.