Semiconductor device and method

Abstract

Disclosed is a semiconductor device comprising a stack of patterned metal layers ( 12 ) separated by dielectric layers ( 14 ), said stack comprising a first conductive support structure ( 20 ) and a second conductive support structure ( 21 ) and a cavity ( 42 ) in which an inertial mass element ( 22 ) comprising at least one metal portion is conductively coupled to the first support structure and the second support structure by respective conductive connection portions ( 24 ), at least one of said conductive connection portions being designed to break upon the inertial mass element being exposed to an acceleration force exceeding a threshold defined by the dimensions of the conductive connection portions. A method of manufacturing such a semiconductor device is also disclosed.

1 . A semiconductor device comprising:
 a stack of patterned metal layers separated by dielectric layers, said stack comprising:   a first conductive support structure and a second conductive support structure; and   a cavity in which an inertial mass element comprising at least one metal portion is conductively coupled to the first support structure and the second support structure by respective conductive connection portions having dimensions, at least one of said conductive connection portions being designed to break upon the inertial mass element being exposed to an acceleration force exceeding a threshold defined by the dimensions of the conductive connection portions.   
     
     
         2 . The semiconductor device of  claim 1 , further comprising a detector for detecting a disruption in said conductive coupling of the metal portion and the first support structure and the second support structure. 
     
     
         3 . The semiconductor device of  claim 1 , wherein the respective conductive connection portions are metal portions from the same metal layer as the metal portion of the inertial mass element, wherein at least one of the respective conductive connection portions has at least one of a reduced width and a reduced thickness compared to the metal portion of the inertial mass element. 
     
     
         4 . The semiconductor device of  claim 1 , wherein the inertial mass element has a plurality of perforations extending through the inertial mass element. 
     
     
         5 . The semiconductor device of  claim 1 , wherein one of the metal layers of the stack below the inertial mass element comprises a first further metal portion extending from the first to the second conductive support structure and a second further metal portion extending from the second to the first conductive support structure, said first and said second further metal portions being separated from each other by a gap preventing said further metal portions becoming conductively connected, said first and said second further metal portions defining an etch barrier for preventing formation of said cavity beyond said further metal portions. 
     
     
         6 . The semiconductor device of  claim 1 , wherein the inertial mass element comprises a stack of metal layer portions separated by dielectric layer portions, each of said dielectric layer portions comprising a plurality of vias for conductively interconnecting the metal layer portions. 
     
     
         7 . The semiconductor device of  claim 1 , wherein the metal portion of the inertial mass element is coupled to respective metal portions of the first and second conductive support structures, said respective metal portions belonging to a different metal layer of the stack than the metal portion of the inertial mass element, and wherein each of the respective conductive connection portions comprises at least one via 
     
     
         8 . The semiconductor device of  claim 7 , wherein the inertial mass element is sandwiched between the metal portion of the first conductive support structure and the metal portion of the second conductive support structure. 
     
     
         9 . The semiconductor device of  claim 7 , wherein the inertial mass element is suspended from the respective metal portions of the first and second conductive support structures by the respective conductive connection portions. 
     
     
         10 . The semiconductor device of  claim 1 , wherein the inertial mass element extends in a lateral direction, and wherein the respective conductive connection portions are connected to the same lateral end portion of the inertial mass element such that the inertial mass element acts as a lever. 
     
     
         11 . The semiconductor device of  claim 10 , wherein one of said conductive connection portions is a metal portion and the other of said conductive connections portions comprises at least one via. 
     
     
         12 . The semiconductor device of  claim 1 , wherein the stack further comprises a perforated metal portion extending over the inertial mass element and at least partially extending over the first and the second conductive support structures. 
     
     
         13 . The semiconductor device of  claim 1 , wherein the stack comprises a plurality of cavities each comprising an inertial mass element conductively coupled to a first conductive support structure and a second conductive support structure by respective conductive connection portions, wherein at least one of the conductive connection portions in each cavity is designed to break upon the inertial mass element being exposed to an acceleration force exceeding a threshold that is unique to that cavity. 
     
     
         14 . A method of manufacturing a semiconductor device, comprising:
 forming a stack of patterned metal layers separated by dielectric layers, said stack comprising a first conductive support structure and a second conductive support structure and an inertial mass element comprising at least one metal portion conductively coupled to the first support structure and the second support structure by respective conductive connection portions each having dimensions, at least one of said conductive connection portions being designed to break upon the inertial mass element being exposed to an acceleration force exceeding a threshold defined by the dimensions of the conductive connection portions;   forming a passivation layer over said stack;   selectively removing the passivation layer over an area comprising the inertial mass element to form an exposed area; and   etching the exposed area to form a cavity around the inertial mass element.   
     
     
         15 . The method of  claim 14 , wherein said stack comprises a perforated metal portion extending over the inertial mass element and at least partially extending over the first and second conductive support structures, wherein said etching step is performed through said perforations.