Semiconductor die package including leadframe with die attach pad with folded edge
Abstract
A semiconductor die package is disclosed. The semiconductor die package comprises a leadframe structure with a die attach pad including a die attach surface, a folded edge structure and an opposite surface opposite to the die attach surface. A plurality of leads extending laterally away from the die attach pad. A semiconductor die comprising a first surface and a second surface is attached to the semiconductor die, and a molding material is around at least a portion of the leadframe structure and at least a portion of the semiconductor die. The opposite surface is exposed through the molding material and terminal ends of the leads do not extend past lateral edges of the molding material.
Claims
exact text as granted — not AI-modified1 - 8 . (canceled)
9 . A method for forming a semiconductor die package, the method comprising:
obtaining a leadframe structure comprising a die attach pad comprising a die attach surface, a folded edge structure and an opposite surface opposite to the die attach surface, and a plurality of leads extending laterally away from the die attach pad; attaching a semiconductor die to the leadframe structure, wherein the semiconductor die comprises a first surface and a second surface, wherein the first surface is attached to the die attach pad; and forming a molding material around at least a portion of the leadframe structure and at least a portion of the semiconductor die, wherein the opposite surface of the leadframe structure is exposed through the molding material and terminal ends of the leads are substantially co-extensive with lateral surfaces of the molding material.
10 . The method of claim 9 wherein the semiconductor die comprises a power MOSFET.
11 . The method of claim 9 wherein the first surface comprises a first electrical terminal and the second surface comprises a second electrical terminal.
12 . The method of claim 9 wherein the leads comprise drain leads integral with the die attach pad, and source and gate leads separated from the die attach pad.
13 . The method of claim 9 wherein the second surface comprises source and gate regions, and wherein the method further comprises:
attaching bonding wires to the die to connect source and gate regions to the source and gate leads, respectively.
14 . The method of claim 9 wherein the leadframe structure comprises copper.
15 . The method of claim 9 wherein the die attach pad comprises at least four folded edge structures surrounding the semiconductor die, and wherein the leads comprise leads that are integral to the die attach pad and at least one lead is between adjacent folded edge structures.
16 . A method of forming an electrical assembly, the method comprising:
forming the semiconductor die package of claim 9 ; and attaching the semiconductor die package to a circuit substrate.
17 . A method comprising:
obtaining an array of leadframe structures, wherein the array of leadframe structures comprises quadrants of leadframe structures; clamping a central clamping area of the array of leadframe structures between quadrants; and forming a molding material around the leadframe structures in the array of leadframe structures.
18 . The method of claim 17 further comprising attaching semiconductor dice to the leadframe structures before clamping and molding.
19 . The method of claim 17 wherein clamping comprises using at least one molding die with a protruding region to clamp down on the clamping region.
20 . The method of claim 17 wherein the leadframe structures each comprise a folded edge structure.Join the waitlist — get patent alerts
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