US2011006379A1PendingUtilityA1

Semiconductor device and manufacturing method thereof

Assignee: FUJITSU SEMICONDUCTOR LTDPriority: Jul 7, 2009Filed: Jun 28, 2010Published: Jan 13, 2011
Est. expiryJul 7, 2029(~2.9 yrs left)· nominal 20-yr term from priority
Inventors:Yoshihiro Takao
H10D 89/10G11C 11/412H10B 10/12H10B 10/00
43
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Claims

Abstract

A semiconductor device includes a silicon substrate in which active regions of a memory cell are defined, a gate electrode formed on a device isolation insulating film to extend in a first direction, a first insulating film formed on the silicon substrate and the gate electrode, a first plug formed to penetrate the first insulating film, to overlap with the gate electrode and the first active region, and to extend in a second direction perpendicular to the first direction, a second plug penetrating the first insulating film above the second active region, a second insulating film formed on the first insulating film, and an interconnection buried in the second insulating film, and formed to recede from a side surface of the first plug in the second direction and to cover only part of an upper surface of the first plug.

Claims

exact text as granted — not AI-modified
1 . A semiconductor device comprising:
 a semiconductor substrate in which a first active region and a second active region of a memory cell of a static random access memory are defined by a device isolation insulating film;   a gate electrode formed over the device isolation insulating film and the first active region, and extending in a first direction;   a first insulating film formed over the semiconductor substrate and the gate electrode;   a first plug formed to penetrate the first insulating film, to overlap with the gate electrode and the first active region, and to have a rectangular planar shape extending in a second direction perpendicular to the first direction;   a second plug formed to penetrate the first insulating film over the second active region;   a second insulating film formed over the first insulating film; and   a interconnection buried in the second insulating film, and formed to extend from a position over the first c plug to a position over the second plug while receding from a side surface of the plug in the second direction, and to cover only a part of an upper surface of the first plug.   
     
     
         2 . The semiconductor device according to  claim 1 , further comprising:
 a third plug formed to penetrate the first insulating film;   a pad buried in the second insulating film over the third plug and around the third plug;   a third insulating film formed over the second insulating film; and   a fourth plug formed to penetrate the third insulating film over the pad.   
     
     
         3 . The semiconductor device according to  claim 2 , wherein;
 the first plug, the second plug, the third plug, and the fourth plug include copper.   
     
     
         4 . A semiconductor device comprising:
 a semiconductor substrate in which a first active region and a second active region are defined by a device isolation insulating film;   a gate electrode formed over the device isolation insulating film and the first active region and extending in a first direction;   a first insulating film formed over the semiconductor substrate and the gate electrode;   a first plug formed to penetrate the first insulating film, to overlap with the gate electrode and the first active region, and to have a rectangular planar shape extending in a second direction perpendicular to the first direction;   a second insulating film formed over the first insulating film;   a second plug formed to penetrate the first insulating film and the second insulating film over the second active region;   a interconnection formed in the second insulating film, formed integrally with the first plug and the second plug, and extending from a position over the first plug to a position over the second copper-containing plug; and   a third plug formed to penetrate the first insulating film and the second insulating film.   
     
     
         5 . The semiconductor device according to  claim 4 , further comprising:
 a third insulating film formed over the second insulating film; and   a fourth plug formed to penetrate the third insulating film over the third plug, wherein   a diameter of the third plug is larger than a diameter of the fourth plug.   
     
     
         6 . The semiconductor device according to  claim 5 , wherein
 the diameter of the third plug is a diameter at a bottom surface of the third copper-containing plug, and   the diameter of the fourth plug is a diameter at a bottom surface of the fourth copper-containing plug.   
     
     
         7 . The semiconductor device according to  claim 4 , wherein
 an etching stopper film is formed between the first insulating film and the second insulating film, and   the interconnection is formed over the etching stopper film.   
     
     
         8 . The semiconductor device according to  claim 5 , wherein;
 the first plug, the second plug, the third plug, and the fourth plug include copper.   
     
     
         9 . The semiconductor device according to  claim 4 , wherein
 the first insulating film is an etching stopper film for the second insulating film.   
     
     
         10 . The semiconductor device according to  claim 1 , wherein
 the first active region comprises a source-drain region of a load transistor included in the memory cell, and   the second active region comprises a source-drain region shared by a driver transistor and an access transistor included in the memory cell.   
     
     
         11 . A method of manufacturing a semiconductor device comprising:
 defining, in a semiconductor substrate, a first active region and a second active region of a memory cell of a static random access memory by forming a device isolation insulating film over the semiconductor substrate;   forming a gate electrode, extending in a first direction, over the device isolation insulating film and the first active region;   forming a first insulating film over the semiconductor substrate and the gate electrode;   forming a first hole in the first insulating film, the first hole overlapping with the gate electrode and the first active region and having a rectangular planar shape extending in a second direction perpendicular to the first direction;   forming a second hole in the first insulating film over the second active region;   forming a first plug and a second plug respectively in the first hole and the second hole;   forming a second insulating film over the first plug, the second plug, and the first insulating film;   forming a trench in the second insulating film, the trench extending from a position over the first plug to a position over the second plug, the trench being formed at a distance from a side surface of the first plug in the second direction; and   forming a interconnection in the trench.   
     
     
         12 . The semiconductor device according to  claim 11 , wherein;
 the first plug and the second plug include copper.   
     
     
         13 . A method of manufacturing a semiconductor device comprising:
 defining, in a semiconductor substrate, a first active region and a second active region of a memory cell of a static random access memory by forming a device isolation insulating film over the semiconductor substrate;   forming a gate electrode, extending in a first direction, over the device isolation insulating film and the first active region;   forming a first insulating film over the semiconductor substrate and the gate electrode;   forming a second insulating film over the first insulating film;   forming a first hole, a second hole and a third hole by patterning the first insulating film and the second insulating film, the first hole having a rectangular planar shape overlapping with the gate electrode and the first active region and extending in a second direction perpendicular to the first direction, the second hole being located over the second active region;   forming a trench by patterning the second insulating film, the trench extending from a position over the first hole to a position over the second hole; and   forming first, second, and third plugs in the first, second, and third holes and forming an interconnection in the trench, thereby forming the interconnection integrally formed with the first plug and the second plug.   
     
     
         14 . The semiconductor device according to  claim 11 , wherein;
 the first plug and the second plug include copper.

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