Semiconductor device package having features formed by electroplating

Abstract

Embodiments in accordance with the present invention relate to the fabrication of packages for semiconductor devices, and in particular to the use of electroplating techniques to form features on the surface of a metal lead frame. In accordance with one embodiment, electroplating is used to fabricate non-integral pin portions shaped to remain securely encapsulated within the plastic molding of the package. In accordance with another embodiment, electroplating may be used to fabricate protrusions on the underside of the lead frame for elevating the package above the PC board, thereby preserving the rounded shape of solder balls used to secure the diepad to the PC board. In accordance with yet another embodiment, electroplating may be used to fabricate raised patterns on the upper surface of the diepad for ensuring uniform spreading of adhesive used to secure the die to the diepad, thereby ensuring level attitude of the die within the package.

1 . A method for forming a semiconductor device package, the method comprising:
 forming a plurality of pins having raised portions, wherein the forming includes:
 using electroplating to create a first layer; and 
 using electroplating to create a second layer adjacent to the first layer, wherein an edge of the second layer extends laterally beyond an edge of the first layer; 
   providing solder connections between the plurality of pins and corresponding contacts on a die; and   encapsulating the raised portions, the die, and the solder connections within a plastic package body.   
     
     
         2 . The method of  claim 1  wherein the electroplating to create a first layer, the electroplating to create a second layer, or both, comprise electroplating copper. 
     
     
         3 . The method of  claim 1  wherein the electroplating to create a first layer, the electroplating to create a second layer, or both, comprises electroplating a material other than copper. 
     
     
         4 . The method of  claim 1  wherein the plurality of pins are formed, at least in part, by electroplating selected regions of a metal sheet. 
     
     
         5 . The method of  claim 1  wherein the plurality of pins are formed, at least in part, by electroplating selected regions of a metal sheet. 
     
     
         6 . The method of  claim 5  wherein the electroplating of selected regions comprises electroplating selected regions exposed by a photoresist mask. 
     
     
         7 . The method of  claim 5  wherein the metal sheet comprises copper. 
     
     
         8 . The method of  claim 7  wherein the electroplated material comprises copper. 
     
     
         9 . The method of  claim 7  wherein the electroplated material comprises a material other than copper. 
     
     
         10 . A method of manufacturing a semiconductor device package, the method comprising:
 providing a die including a surface having contact pads;   providing a plurality of pins having broad portions and raised portions, wherein:
 the raised portions include first layer formed by electroplating; and 
 the broad portions include a second layer formed by electroplating; 
   creating solder connections between the plurality of pins and corresponding pads on the die; and   embedding the die, solder connections, and broad pin portions within an encapsulant.   
     
     
         11 . The method of  claim 10  wherein the first layer is formed by electroplating selective areas of a metal sheet exposed by a photoresist mask. 
     
     
         12 . The method of  claim 10  wherein the second layer is formed by electroplating over metal present in an open area of a photoresist mask.