US2011001193A1PendingUtilityA1

Semiconductor device with an improved operating property

Assignee: PANASONIC CORPPriority: Dec 17, 2004Filed: Sep 15, 2010Published: Jan 6, 2011
Est. expiryDec 17, 2024(expired)· nominal 20-yr term from priority
H10W 20/056H10W 20/40H10W 20/033H10W 20/089H10D 84/0186H10D 84/0167H10D 84/038H10D 30/794H10D 30/791
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Claims

Abstract

The semiconductor comprises an n-channel transistor forming region and a p-channel transistor forming region, which are disposed while being sectioned by an element isolation region. The stress caused by contact plugs in the n-channel transistor forming region and the stress caused by contact plugs in the p-channel transistor forming region are made different from each other. With this, it enables to increase the drive current of both the n-channel transistor and p-channel transistor without changing the dimensions of the active region and the element isolation region.

Claims

exact text as granted — not AI-modified
1 - 26 . (canceled) 
     
     
         27 . A semiconductor device, comprising:
 an n-channel transistor forming region and a p-channel transistor forming region, which are separated by an element isolation region; wherein   a channel region of the n-channel transistor forming region is exposed to higher tensile stress than a channel region of the p-channel transistor forming region, and the height of contact plugs of the p-channel transistor forming region is less than the height of contact plugs of the n-channel transistor forming region.   
     
     
         28 . The semiconductor device according to  claim 27 , wherein the contact plugs of the n-channel transistor forming region are made of a material having tensile stress. 
     
     
         29 . The semiconductor device according to  claim 27 , wherein
 the diameter of the contact plugs of the n-channel transistor forming region is larger than the diameter of the contact plugs of the p-channel transistor forming region.   
     
     
         30 . The semiconductor device according to  claim 27 , wherein
 a distance between the contact plugs of the n-channel transistor forming region and a gate electrode of the n-channel transistor forming region is greater than a distance between the contact plugs of the p-channel transistor forming region and a gate electrode of the p-channel transistor forming region.   
     
     
         31 . The semiconductor device according to  claim 27 , wherein
 stress which is generated in the n-channel transistor forming region due to the contact plugs of the n-channel transistor forming region and stress which is generated in the p-channel transistor forming region due to the contact plugs of the p-channel transistor forming region differ from each other.   
     
     
         32 . The semiconductor device according to  claim 31 , wherein
 a difference between stress in the n-channel transistor forming region and stress in the p-channel transistor forming region is generated by a difference in the height of the contact plugs of the n-channel transistor forming region and the height of the contact plugs of the p-channel transistor forming region.   
     
     
         33 . The semiconductor device according to  claim 31 , wherein
 a difference between stress in the n-channel transistor forming region and the p-channel transistor forming region is generated by a difference in the shape of the contact plugs of the n-channel transistor forming region and the shape of the contact plugs of the p-channel transistor forming region.

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