Liquid crystal display device

Abstract

First and second sub-picture element electrodes, a buffer capacitance, and a first to third TFTs are formed in each picture element; the first and second TFTs are driven by a signal supplied to an nth gate bus line; the third TFT is driven by a signal supplied to an (n+1)th gate bus line; the first sub-picture element electrode is connected to the first and third TFTs; the second sub-picture element electrode is connected to the second TFT; a drain electrode of the third TFT is connected to an upper electrode of the buffer capacitance; and a lower electrode of this buffer capacitance is connected to the (n+1)th gate bus line.

1 . A liquid crystal display device which is configured of first and second substrates arranged opposite to each other as well as liquid crystal filled in an interstice between the first and second substrates, and which includes a plurality of picture elements arrayed in a matrix, the liquid crystal display device comprising:
 a plurality of gate bus lines for supplying scanning signals respectively to the picture elements;   a plurality of data bus lines for supplying display signals respectively to the picture elements;   first and second sub-picture element electrodes formed in each of the picture elements;   a buffer capacitance formed in each of the picture elements;   a first transistor which is driven by a scanning signal of an nth gate bus line (n is an integer), and which transfers a display signal of an mth data bus line (m is an integer) to the first sub-picture element electrode in an nth row and an mth column while the first transistor is on;   a second transistor which is driven by the scanning signal of the nth gate bus line, and which transfers the display signal of the mth data bus line to the second sub-picture element electrode in the nth row and the mth column while the second transistor is on; and   a third transistor which is connected between the first sub-picture element electrode in the nth row and the mth column and the buffer capacitance, and which is driven by a scanning signal of a (n+1)th gate bus line.