Mems integrated chip with cross-area interconnection

Abstract

The present invention discloses a MEMS (Micro-Electro-Mechanical System) integrated chip with cross-area interconnection, comprising: a substrate; a MEMS device area on the substrate; a microelectronic device area on the substrate; a guard ring separating the MEMS device area and the microelectronic device area; and a conductive layer on the surface of the substrate below the guard ring, or a well in the substrate below the guard ring, as a cross-area interconnection electrically connecting the MEMS device area and the microelectronic device area.

1 . A MEMS (Micro-Electro-Mechanical System) integrated chip with cross-area interconnection, comprising:
 a substrate;   a MEMS device area on the substrate;   a microelectronic device area on the substrate; and   a guard ring separating the MEMS device area and the microelectronic device area, the guard ring including a structural layer on the substrate and a contact layer on the structural layer, wherein the contact layer is for a cross-area interconnection electrically connecting the MEMS device area and the microelectronic device area.   
     
     
         2 . The MEMS integrated chip of  claim 1 , wherein the structural layer includes one selected from an undoped polysilicon layer, a silicon nitride layer and a silicon oxynitride layer. 
     
     
         3 . A MEMS integrated chip with cross-area interconnection, comprising:
 a substrate;   a MEMS device area on the substrate;   a microelectronic device area on the substrate;   a guard ring separating the MEMS device area and the microelectronic device area; and   a conductive layer on a surface of the substrate below the guard ring, as a cross-area interconnection electrically connecting the MEMS device area and the microelectronic device area.   
     
     
         4 . The MEMS integrated chip of  claim 3 , wherein a material of the conductive layer includes cobalt silicide or titanium silicide. 
     
     
         5 . The MEMS integrated chip of  claim 3 , further including a well in the substrate below the conductive layer. 
     
     
         6 . The MEMS integrated chip of  claim 5 , wherein the well and the substrate form a junction diode. 
     
     
         7 . The MEMS integrated chip of  claim 3 , wherein the guard ring includes a structural layer with dielectric function on the substrate. 
     
     
         8 . The MEMS integrated chip of  claim 7 , wherein the structural layer includes one selected from an undoped polysilicon layer, a silicon nitride layer and a silicon oxynitride layer. 
     
     
         9 . The MEMS integrated chip of  claim 3 , wherein the MEMS device area includes a contact layer forming connection lines. 
     
     
         10 . A MEMS integrated chip with cross-area interconnection, comprising:
 a substrate;   a MEMS device area on the substrate;   a microelectronic device area on the substrate;   a guard ring separating the MEMS device area and the microelectronic device area; and   a well in the substrate below the guard ring, as a cross-area interconnection electrically connecting the MEMS device area and the microelectronic device area.   
     
     
         11 . The MEMS integrated chip of  claim 10 , wherein the well including a doped region and a heavily doped region above the doped region. 
     
     
         12 . The MEMS integrated chip of  claim 10 , wherein the well and the substrate form a junction diode. 
     
     
         13 . The MEMS integrated chip of  claim 10 , wherein the guard ring includes a structural layer with dielectric function on the substrate. 
     
     
         14 . The MEMS integrated chip of  claim 13 , wherein the structural layer includes one selected from an undoped polysilicon layer, a silicon nitride layer and a silicon oxynitride layer. 
     
     
         15 . The MEMS integrated chip of  claim 10 , further including a conductive layer on a surface of the substrate above the well and below the guard ring. 
     
     
         16 . The MEMS integrated chip of  claim 15 , wherein a material of the conductive layer includes cobalt silicide or titanium silicide. 
     
     
         17 . The MEMS integrated chip of  claim 10 , wherein the MEMS device area includes a contact layer forming connection lines. 
     
     
         18 . The MEMS integrated chip of  claim 10 , wherein the well extends under the MEMS device area. 
     
     
         19 . The MEMS integrated chip of  claim 15 , wherein the well extends under the MEMS device area.