Test pattern generation apparatus, test pattern generation method, and medium storing test pattern generation program
Abstract
A test pattern generation apparatus includes an activation rate setting unit configured to set an activation rate of a cell, a test pattern generator configured to generate a test pattern based on the activation rate set by the activation rate setting unit, a supply voltage calculator configured to calculate a supply voltage of a semiconductor integrated circuit using the test pattern generated by the test pattern generator, and an output unit configured to output the test pattern generated by the test pattern generator when the supply voltage calculated by the supply voltage calculator fulfills the target supply voltage.
Claims
exact text as granted — not AI-modified1 . A test pattern generation apparatus comprising:
an activation rate setting unit configured to set an activation rate of a cell; a test pattern generator configured to generate a test pattern based on the activation rate set by the activation rate setting unit; a supply voltage calculator configured to calculate a supply voltage of a semiconductor integrated circuit using the test pattern generated by the test pattern generator; and an output unit configured to output the test pattern generated by the test pattern generator when the supply voltage calculated by the supply voltage calculator fulfills the target supply voltage.
2 . The apparatus of claim 1 , wherein the activation rate setting unit reconfigures the activation rate of the cell when the supply voltage does not fulfill the target supply voltage.
3 . The apparatus of claim 2 , wherein the activation rate setting unit adds the activation rate corresponding to an absolute value of a difference between the supply voltage and a target supply voltage to an already-set activation rate or subtracts the activation rate corresponding to the absolute value of the difference between the supply voltage and the target supply voltage from the already-set activation rate.
4 . The apparatus of claim 1 , further comprising a grouping unit configured to produce a group by assigning a plurality of cells in regions having the common target supply voltage,
wherein the activation rate setting unit sets the activation rate in each group produced by the grouping unit.
5 . The apparatus of claim 2 , further comprising a grouping unit configured to produce a group by assigning a plurality of cells in regions having the common target supply voltage,
wherein the activation rate setting unit sets the activation rate in each group produced by the grouping unit.
6 . The apparatus of claim 3 , further comprising a grouping unit configured to produce a group by assigning a plurality of cells in regions having the common target supply voltage,
wherein the activation rate setting unit sets the activation rate in each group produced by the grouping unit.
7 . The apparatus of claim 4 , wherein the grouping unit corrects the group when the supply voltage does not fulfill the target supply voltage.
8 . The apparatus of claim 5 , wherein the grouping unit corrects the group when the supply voltage does not fulfill the target supply voltage.
9 . The apparatus of claim 6 , wherein the grouping unit corrects the group when the supply voltage does not fulfill the target supply voltage.
10 . A test pattern generation method comprising:
setting an activation rate of a cell; generating a test pattern based on the activation rate; calculating a supply voltage of a semiconductor integrated circuit using the test pattern; and outputting the test pattern when the supply voltage calculated by the supply voltage calculator fulfills the target supply voltage.
11 . The method of claim 10 , wherein in setting the activation rate, the activation, rate of the cell is reconfigured when the supply voltage does not fulfill the target supply voltage.
12 . The method of claim 11 , wherein in setting the activation rate, the activation rate corresponding to an absolute value of a difference between the supply voltage and a target supply voltage is added to an already-set activation rate or the activation rate corresponding to the absolute value of the difference between the supply voltage and the target supply voltage is subtracted from the already-set activation rate.
13 . The method of claim 10 , further comprising producing a group by assigning a plurality of cells in regions having the common target supply voltage,
wherein in setting the activation rate, the activation rate in each group is set.
14 . The method of claim 11 , further comprising producing a group by assigning a plurality of cells in regions having the common target supply voltage,
wherein in setting the activation rate, the activation rate in each group is set.
15 . The method of claim 12 , further comprising producing a group by assigning a plurality of cells in regions having the common target supply voltage,
wherein in setting the activation rate, the activation rate in each group is set.
16 . The method of claim 13 , wherein in producing the group, the group is corrected when the supply voltage does not fulfill the target supply voltage.
17 . The method of claim 14 , wherein in producing the group, the group is corrected when the supply voltage does not fulfill the target supply voltage.
18 . The method of claim 15 , wherein in producing the group, the group is corrected when the supply voltage does not fulfill the target supply voltage.
19 . A medium storing a program to make a computer execute a test pattern generation method comprising:
setting an activation rate of a cell; generating a test pattern based on the activation rate; calculating a supply voltage of a semiconductor integrated circuit using the test pattern; and outputting the test pattern when the supply voltage calculated by the supply voltage calculator fulfills the target supply voltage.
20 . The medium of claim 19 , wherein in setting the activation rate, the activation rate of the cell is reconfigured when the supply voltage does not fulfill the target supply voltage.Join the waitlist — get patent alerts
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