US2010258906A1PendingUtilityA1

Capacitor of semiconductor device and method of fabricating the same

Assignee: CHOI JOONG ILPriority: Apr 20, 2007Filed: Jun 22, 2010Published: Oct 14, 2010
Est. expiryApr 20, 2027(~0.7 yrs left)· nominal 20-yr term from priority
Inventors:Joong Il Choi
H10D 1/716H10D 1/042H10B 12/00
32
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Claims

Abstract

A method of fabricating a semiconductor device includes forming a buffer insulating film over a semiconductor substrate including a conductive pattern. The buffer insulating film is etched using a storage node mask to form a buffer insulating pattern exposing the conductive pattern. The buffer insulating pattern defines a region wider than a storage node region. An etch stop film is formed over the conductive pattern and the buffer insulating pattern. An interlayer insulating film is formed over the etch stop film. The interlayer insulating film is etched using the storage node mask to expose the etch stop film. The exposed etch stop film is etched to form the storage node region exposing conductive pattern. A lower storage node is formed over the storage node region.

Claims

exact text as granted — not AI-modified
1 - 6 . (canceled) 
     
     
         7 . A capacitor of a semiconductor device comprising;
 a first lower storage node contacting conductive patterns wherein the first lower storage node has a first line-width;   a buffer insulating pattern formed adjacent to sidewalls of the first lower storage node; and   a second lower storage node contacting the first lower storage node wherein the second lower storage node has a second line-width narrower than the first line-width.   
     
     
         8 . The capacitor of a semiconductor device of  claim 7 , wherein the conductive patterns are storage node contact plugs. 
     
     
         9 . The capacitor of a semiconductor device of  claim 7 , wherein the first lower storage node and the second lower storage node include a titanium layer, a titanium nitride film, or a combination thereof. 
     
     
         10 . The capacitor of a semiconductor device of  claim 7 , wherein the buffer insulating pattern has a thickness in a range of about 1,000 to 2,000 Å.

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