US2010257500A1PendingUtilityA1

System for placing elements of semiconductor integrated circuit, method of placing elements thereon, and program for placing elements

Assignee: NEC CORPPriority: Jul 13, 2004Filed: Jun 17, 2010Published: Oct 7, 2010
Est. expiryJul 13, 2024(expired)· nominal 20-yr term from priority
Inventors:Kohei Uchida
G06F 30/392H10D 84/00H10D 84/01
48
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Claims

Abstract

An element placement system including a placement and routing library that stores element information about logical elements to be placed, placement information containing region information of regions in which logical elements can be placed, and routing information necessary to execute routing, a placement improvement library that stores specified element information about specified logical elements being logical elements specified to place capacitors in the vicinity thereof, a placement unit that places logical elements according to input data containing connection data between logical elements and the placement information stored in the placement and routing library, a placement improvement unit that improves a result of placement by the placement unit by moving logical elements other than specified logical elements stored in the placement improvement library to collect spaces into the vicinity of the specified logical elements, a routing unit that routes logical elements after placement improvement by the placement improvement unit based on the input data, and a capacitor generation unit that places capacitors in the collected spaces.

Claims

exact text as granted — not AI-modified
1 . A computer-readable storage medium having embodied thereon a program, for enabling a computer to perform an element placement method for a semiconductor integrated circuit that places a plurality of logical elements according to input data comprising connection data between said plurality of logical elements, placement information including information about said plurality of logical elements to be placed and region information of regions in which said plurality of logical elements can be placed, and routing information for said plurality of logical elements, the placement information and routing information stored in a placement and routing library, the method comprising:
 placing said plurality of logical elements according to said input data and said placement information;   referring to a placement improvement library which stores element information on at least a first logical element from among the plurality of logical elements in the vicinity of which a capacitor is to be placed, and moving at least a second logical element from among the plurality of logical elements to create a space in the vicinity of an area in which the first logical element is placed based on the element information of the first logical element stored in the placement improvement library; and   placing the capacitor in the created space.   
     
     
         2 . The computer-readable storage medium of  claim 1 , wherein the method further comprises moving the first logical element to create additional space in the vicinity thereof, after moving the second logical element. 
     
     
         3 . The computer-readable storage medium of  claim 1 , wherein the method further comprises moving at least a third logical element from among the plurality of logical elements to a row area different from a row area in which the first logical element is placed, to create a space in the vicinity of the first logical element.

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