Semiconductor device
Abstract
A semiconductor device is disclosed, which includes a first interlayer insulating film, a lower-layer interconnection in a first groove in the first film, a second interlayer insulating film over the first film, having a normal via hole opening to the lower-layer interconnection, a normal plug in the normal hole, a third interlayer insulating film over the second film, having a second groove opening to the normal plug, an upper-layer interconnection in the second groove, and a first dummy plug in a first dummy via hole in the second film, the first dummy via hole opening to one of the lower-layer and upper-layer interconnections, wherein a short side of the first dummy plug is larger than a minimum width of a minimum width interconnection and smaller than a minimum diameter of a minimum diameter via hole and a long side is larger than a shortest length of a shortest length interconnection.
Claims
exact text as granted — not AI-modified1 - 10 . (canceled)
11 . A semiconductor device comprising:
a first interlayer insulating film formed on a semiconductor substrate; a lower-layer interconnection formed in a first groove formed in the first interlayer insulating film; a second interlayer insulating film formed on the first interlayer insulating film and the lower-layer interconnection, the second interlayer insulating film having a normal via hole, a dummy via hole, and a second groove, the normal via hole and the dummy via hole opening to the lower-layer interconnection, and the second groove opening to the normal via hole; an upper-layer interconnection formed in the normal via hole and the second groove formed in the second interlayer insulating film; and a dummy plug embedded in the dummy via hole formed in the second interlayer insulating film,
wherein a short side of the dummy plug in a plan pattern is larger than a minimum width of a minimum width interconnection and smaller than a minimum diameter of a minimum diameter via hole and a long side of the dummy plug in the plan pattern is larger than a shortest length of a shortest length interconnection.
12 . A semiconductor device according to claim 11 , wherein
the lower-layer interconnection is formed of a first barrier metal layer and a first embedded metal layer, the upper-layer interconnection is formed of a second barrier metal layer and a second embedded metal layer, and the dummy plug is formed of a third barrier metal layer and a third embedded metal layer.
13 . A semiconductor device according to claim 12 , wherein the barrier metal layer of the lower-layer interconnection, the barrier metal layer of the upper-layer interconnection, and the barrier metal layer of the plug is made of Ti or TiN.
14 . A semiconductor device according to claim 12 , wherein the embedded metal layer of the lower-layer interconnection, the embedded metal layer of the upper-layer interconnection, and the embedded metal layer of the plug is made of Cu, Al, Ag, or W.
15 . A semiconductor device according to claim 12 , wherein the embedded metal layer of the lower-layer interconnection, the embedded metal layer of the upper-layer interconnection, and the embedded metal layer of the plug are made of a material in which principal component is Cu.
16 . A semiconductor device comprising:
a first interlayer insulating film formed on a semiconductor substrate; a first plug formed in a first via hole formed in the first interlayer insulating film; a second interlayer insulating film formed on the first interlayer insulating film and the first plug; a normal interconnection formed in a first groove formed in the second interlayer insulating film and connected to the first plug; a second plug formed on the normal interconnection formed in the second interlayer insulating film; and a dummy interconnection formed in a second groove formed in a region of the second interlayer insulating film, which corresponds to other region than those where the first plug and the second plug are formed, the dummy interconnection being connected to a first embedded metal of the normal interconnection,
wherein the dummy interconnection has a width which is smaller than a minimum width of a minimum width interconnection.
17 . A semiconductor device according to claim 16 , wherein
the normal interconnection is made of a first barrier metal layer and the first embedded metal layer and the dummy interconnection is made of a second barrier metal layer and a second embedded metal layer.
18 . A semiconductor device according to claim 17 , wherein the barrier metal layer of the normal interconnection and the barrier metal layer of the dummy interconnection are made of Ti or TiN.
19 . A semiconductor device according to claim 17 , wherein the embedded metal layer of the normal interconnection and the embedded metal layer of the dummy interconnection consist are made of Cu, Al, Ag, or W.
20 . A semiconductor device according to claim 17 , wherein the embedded metal layer of the normal interconnection and the embedded metal layer of the dummy interconnection consist are made of a material whose principal component is Cu.Join the waitlist — get patent alerts
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