Electronic device
Abstract
An electronic device includes a first reset signal generator arranged to output a first reset signal when a power supply voltage becomes lower than or equal to a first threshold, a second reset signal generator arranged to output a second reset signal when the power supply voltage becomes lower than or equal to a second threshold lower than the first threshold, a return reset signal generator arranged to output a return reset signal based on a termination of the output of the first reset signal, a first resetting device arranged to be reset based on the first reset signal, a second resetting device arranged to be reset based on the second reset signal and the return reset signal, and a pre-processor arranged in the second resetting device to start a preliminary process of resetting based on the first reset signal.
Claims
exact text as granted — not AI-modified1 . An electronic device comprising:
a first reset signal generator arranged to output a first reset signal when a power supply voltage becomes lower than or equal to a first threshold; a second reset signal generator arranged to output a second reset signal when the power supply voltage becomes lower than or equal to a second threshold lower than the first threshold; a return reset signal generator arranged to output a return reset signal based on a termination of the output of the first reset signal; a first resetting device arranged to be reset based on the first reset signal; a second resetting device arranged to be reset based on the second reset signal and the return reset signal; and a pre-processor arranged in the second resetting device to start a preliminary process of resetting based on the first reset signal.
2 . The electronic device according to claim 1 , wherein the pre-processor is arranged to start to save data held in a volatile storage device to a nonvolatile storage device based on the first reset signal.
3 . The electronic device according to claim 1 , wherein the return reset signal generator is arranged to output the return reset signal for a constant period from a termination of the output of the first reset signal using a delay circuit.
4 . The electronic device according to claim 3 , wherein the return reset signal generator includes a negate circuit arranged to invert the first reset signal and an OR circuit arranged to receive an output signal of the negate circuit and an output signal of the delay circuit, and to output the return reset signal from the OR circuit.
5 . The electronic device according to claim 1 , further comprising an AND circuit arranged to receive the second reset signal and the return reset signal and to output a logical sum reset signal, wherein the second resetting device is reset based on the logical sum reset signal.
6 . An electronic device comprising:
means for outputting a first reset signal when a power supply voltage becomes lower than or equal to a first threshold; means for outputting a second reset signal when the power supply voltage becomes lower than or equal to a second threshold lower than the first threshold; means for outputting a return reset signal based on a termination of the output of the first reset signal; a first resetting device arranged to be reset based on the first reset signal; a second resetting device arranged to be reset based on the second reset signal and the return reset signal; and means for starting a preliminary process of resetting based on the first reset signal.
7 . The electronic device according to claim 6 , further comprising means for starting to save data held in a volatile storage device to a nonvolatile storage device based on the first reset signal.
8 . The electronic device according to claim 6 , further comprising means for outputting a return reset signal for a constant period from a termination of the output of a delayed first reset signal.
9 . The electronic device according to claim 8 , further comprising:
means for inverting the first reset signal; and means for taking a logical sum of the inverted first reset signal and an output signal from a delay circuit, and outputting the return reset signal.
10 . The electronic device according to claim 6 , further comprising:
means for generating a logical sum signal from the second reset signal and the return reset signal; and means for resetting the second resetting device based on the logical sum reset signal.Join the waitlist — get patent alerts
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