Method of disposing dummy pattern

Abstract

A method of disposing a dummy pattern includes the steps of obtaining an inter-wiring parasitic capacity and a wiring total parasitic capacity for each wiring using wiring layout data and initial dummy pattern layout data; creating a first data base based on the inter-wiring parasitic capacity; creating a second data base based on the wiring total parasitic capacity; performing dynamic and static simulations for creating a third data base storing the results of the dynamic and static simulations, the result of the dynamic simulation being information about the first wiring, and the result of the static simulation being information about the second wiring; and performing an additional insertion of dummy pattern near a third wiring, the third wiring being determined to be a wiring which is capable of be affected by voltage noise based on the data in the third data base.

1 - 41 . (canceled) 
   
   
       42 . A method of disposing a dummy pattern, which is used for a semiconductor integrated circuit having a multilevel wiring structure in which a power supply wiring layer and a signal wiring layer are sequentially laminated, the method comprising the step of:
 disposing a dummy pattern on a region of the signal wiring layer that is adjacent to the power supply wiring layer, the power supply wiring layer including a first power supply wiring layer having a first power supply wiring extending toward a first direction, and a second power supply wiring layer having a second power supply wiring extending toward a second direction which is perpendicular to the first direction, the region corresponding to the crossover point where the first power supply wiring and the second power supply wiring cross over each other.   
   
   
       43 . The method of disposing a dummy pattern according to  claim 42 , wherein the potential applied to the first power supply wiring differs from the potential applied to the second power supply wiring. 
   
   
       44 . The method of disposing a dummy pattern according to  claim 43 , wherein the first power supply wiring is a VDD wiring, and the second power supply wiring is a GND wiring.