Socket, and test apparatus and method using the socket

Abstract

An apparatus for testing electric characteristics of a test object including first connection terminals on a bottom surface and second connection terminals on a top surface, the apparatus comprises a test board comprising first pads on a predetermined surface; a socket configured to electrically connect the test object to the test board; and a handler configured to transport the test object to the socket. The socket comprises a first connection unit configured to be electrically connected to the first connection terminals of the test object and a second connection unit configured to be electrically connected to the second connection terminals of the test object.

1 . A method of testing electric characteristics of a test object including first connection terminals on a bottom surface and second connection terminals on a top surface, the method comprising:
 providing a socket and loading the test object in the socket, the sockethaving first pins electrically contacting the first connection terminals of the test object and second pins electrically contacting the second connection terminals of the test object; and   applying an electric signal from a test board to the first pins to simultaneously test electric characteristics of the first and second connection terminals of the test object.   
     
     
         2 . The method of  claim 1 , further comprising:
 electrically connecting the second pins of the socket to an electronic device using a socket substrate that allows the electronic device to exchange electric signals with the test object,   including transmitting the electric signal output from the test board back to the test board through the first pins, the test object, the second pins, the socket substrate, the electronic device, the socket substrate, the second pins, the test object, and the first pins.   
     
     
         3 . The method of  claim 2 , wherein the test object is a semiconductor device package in which a first semiconductor device is packaged, and the electronic device comprises a second semiconductor device exchanging electric signals with the first semiconductor device. 
     
     
         4 . The method of  claim 2 , wherein the test object is a first semiconductor device package in which a first semiconductor device is packaged, and
 the electronic device comprises a second semiconductor device of a second semiconductor device package to be stacked on the first semiconductor device package.   
     
     
         5 . The method of  claim 4 , wherein the first semiconductor device comprises a logic chip, and the second semiconductor device comprises a memory chip. 
     
     
         6 . The method of  claim 1 , further comprising:
 providing third pins contacting the test board, and a socket substrate electrically connecting the second pins and the third pins,   including transmitting the electric signal output from the test board back to the test board through the first pins, the test object, the second pins, the socket substrate, and the third pins.   
     
     
         7 . The method of  claim 6 , wherein the test object is a semiconductor device package. 
     
     
         8 . The method of  claim 6 , wherein the test object is one of a plurality of semiconductor device packages included in a multi-chip semiconductor device package.