US2010225805A1PendingUtilityA1
Video processor and method for automated deinterlacing and inverse telecine
Est. expiryJan 10, 2023(expired)· nominal 20-yr term from priority
Inventors:Gregory J. Conklin
H04N 7/012H04N 7/0112
60
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Claims
Abstract
A video apparatus is provided with automatic deinterlacing and inverse telecine pre-filtering capability to automatically analyze the frames of the video to determine at least whether the video is one of telecine, non-telecine progressive and non-telecine interlaced formatted, and to automatically reformat the video into a non-telecine progressive format if the video is determined to be one of telecine and non-telecine interlaced formatted.
Claims
exact text as granted — not AI-modified1 . (canceled)
2 . A video processor, comprising:
a video data input configured to receive a video file including a succession of video frames; a telecine and non-telecine progressive detector configured to receive the succession of video frames from the video data input and perform concurrent detection of a progressive scan pattern; an interlaced detector configured to receive the succession of video frames and perform detection of an interlaced pattern if the telecine and non-telecine progressive detector does not detect a progressive scan pattern; a telecine inverter configured to receive the succession of video frames including a telecine pattern and drop frames to convert the succession of video frames including a telecine pattern to a succession of non-telecine frames; a deinterlacer configured to receive a succession of interlaced video frames and convert the succession of interlaced video frames to a succession of progressive scan video frames; a selector configured to select one of video data received by the video data input, video data output by the telecine inverter, or video data output by the deinterlacer for output; and a video data output configured to output a succession of non-telecine progressive video frames selected by the selector.
3 . The video processor of claim 2 , wherein the telecine inverter is further configured to output a frame-drop signal each time a frame is dropped from the succession of video frames.
4 . The video processor of claim 3 , wherein the telecine and non-telecine progressive detector is configured to receive the frame-drop signal and, if the frame-drop signal is received within an allotted time since the previous frame-drop signal, indicate a progressive measure if a progressive pattern is detected or indicate an interlaced measure if a progressive pattern is not detected.
5 . The video processor of claim 4 , wherein the allotted time is in the range of 145 to 175 milliseconds.
6 . The video processor of claim 4 , wherein the allotted time corresponds to five frames in the succession of video frames.
7 . The video processor of claim 4 , wherein indicating a progressive measure includes incrementing a progressive counter.
8 . The video processor of claim 4 , wherein indicating an interlaced measure includes incrementing an interlaced counter.
9 . The video processor of claim 4 , wherein indicating a progressive measure or an interlaced measure includes incrementing one counter and decrementing another counter.
10 . The video processor of claim 2 , wherein the telecine and non-telecine progressive detector and the interlaced detector are operatively coupled to the selector; and
wherein the selector is configured to select the video data for output responsive to information received from the telecine and non-telecine progressive detector and the interlaced detector.
11 . The video processor of claim 2 , wherein each of the telecine and non-telecine progressive detector, the interlaced detector, the telecine inverter, the deinterlacer, and the selector includes a respective electrical circuit not shared with the others of the telecine and non-telecine progressive detector, the interlaced detector, the telecine inverter, the deinterlacer, and the selector telecine and non-telecine progressive detector, the interlaced detector, the telecine inverter, the deinterlacer, and the selector is embodied in computer-readable instructions stored on a tangible computer-readable medium.
12 . The video processor of claim 2 , wherein the interlaced detector is configured to operate only if the telecine and non-telecine progressive detector does not detect a progressive scan pattern in frames.
13 . The video processor of claim 2 , wherein the interlaced detector is further configured to indicate an interlaced detection measure if interlaced video frames are detected.
14 . The video processor of claim 13 , wherein indicating an interlaced detection measure includes incrementing an interlaced counter.
15 . The video processor of claim 14 , wherein the succession of video frames are considered to be interlaced if the interlaced counter reaches a threshold.
16 . The video processor of claim 2 , wherein the a telecine and non-telecine progressive detector, the interlaced detector, the telecine inverter, the deinterlacer, and the selector are configured to operate without human intervention.
17 . The video processor of claim 2 , wherein concurrent detection of a progressive scan pattern by the progressive detector includes detection of a progressive scan pattern in frames not including a telecine pattern or a progressive scan pattern in frames including a telecine pattern.
18 . The video processor of claim 17 wherein the progressive detector is configured to provide detection of a progressive scan pattern in either frames not including a telecine pattern or in frames including a telecine pattern responsive to receiving a frame drop signal issued by the telecine inverter
19 . A method for operating a video conversion apparatus, comprising:
receiving a first plurality of video frames via a first data interface and buffering the first plurality of video frames in a memory; performing inverse telecine conversion on the first plurality of video frames to produce a second plurality of video frames if the first plurality of video frames include a telecine pattern and, if inverse telecine conversion is performed, issuing a frame drop signal when frames are dropped from the first plurality of video frames; if the frame drop signal is issued at an elapsed time interval consistent with a telecine progressive scan pattern, analyzing the first plurality of video frames in the memory to detect if the video frames include a telecine progressive scan pattern; if the first plurality of video frames do not include a telecine progressive scan pattern, analyzing a plurality of video frames to detect if the video frames are interlaced; if an interlaced pattern is detected, increasing an interlaced detection measure and converting the plurality of video frames to a third plurality of video frames in a progressive scan format; and outputting via a second data interface or storing on a computer-readable medium one of the first plurality of video frames, the second plurality of video frames, or the third plurality of video frames in a non-telecine progressive scan video format.
20 . The method for operating a video conversion apparatus of claim 19 , further comprising:
if a telecine progressive scan pattern is detected, increasing a progressive detection measure.
21 . The method for operating a video conversion apparatus of claim 20 , wherein increasing a progressive detection measure includes incrementing a progressive counter.
22 . The method for operating a video conversion apparatus of claim 19 , wherein if a telecine progressive scan pattern is detected, outputting the video frames via the second data interface includes outputting the second plurality of video frames.
23 . The method for operating a video conversion apparatus of claim 19 , further comprising:
if the frame drop signal is not issued at an elapsed time interval consistent with a telecine progressive scan pattern, analyzing the first plurality of video frames in the memory to detect if the video frames include a non-telecine progressive scan pattern.
24 . The method for operating a video conversion apparatus of claim 23 , further comprising:
if a non-telecine progressive scan pattern is detected, increasing a progressive detection measure; and wherein outputting the video frames via the second data interface includes outputting the first plurality of video frames.
25 . The method for operating a video conversion apparatus of claim 23 , further comprising:
if a non-telecine progressive scan pattern is not detected in the first plurality of video frames, analyzing the first plurality of video frames to detect if the video frames are interlaced.
26 . The method for operating a video conversion apparatus of claim 25 , further comprising:
if a non-telecine progressive scan pattern is detected in the first plurality of video frames, decreasing a progressive detection measure.
27 . The method for operating a video conversion apparatus of claim 26 , wherein decreasing the progressive measure includes decrementing a progressive counter.
28 . The method for operating a video conversion apparatus of claim 25 , further comprising:
if an interlaced pattern is detected, deinterlacing the second plurality of video frames to a third plurality of video frames in a progressive scan format; and wherein outputting the video frames via the second data interface includes outputting the third plurality of video frames.
29 . The method for operating a video conversion apparatus of claim 19 , wherein the frame drop signal is issued at an elapsed time interval consistent with a telecine progressive scan pattern includes frame drop signals issued at an interval of between 145 and 175 milliseconds.
30 . The method for operating a video conversion apparatus of claim 19 , wherein the frame drop signal is issued at an elapsed time interval consistent with a telecine progressive scan pattern includes frame drop signals issued at an interval corresponding to five video frames.
31 . The method for operating a video conversion apparatus of claim 19 , wherein the steps are performed without human intervention.Join the waitlist — get patent alerts
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