Semiconductor integrated circuit device and method of manufacturing the same

Abstract

Provided is a semiconductor integrated circuit device including a capacitor element with an improved TDDB life. A semiconductor integrated circuit device ( 1 ) includes: a first electrode ( 4 ) including a first semiconductor layer which protrudes with respect to a plane of a substrate; a side surface insulating film ( 5 ) formed on at least a part of a side surface of the first electrode ( 4 ); an upper surface insulating film ( 6 ) formed on the first electrode ( 4 ) and the side surface insulating film ( 5 ); and a second electrode ( 7 ) which covers the side surface insulating film ( 5 ) and the upper surface insulating film ( 6 ). The first electrode ( 4 ), the side surface insulating film ( 5 ), and the second electrode ( 7 ) constitute a capacitor element. A thickness of the upper surface insulating film ( 6 ) between the first electrode ( 4 ) and the second electrode ( 7 ) is larger than a thickness of the side surface insulating film ( 5 ) between the first electrode ( 4 ) and the second electrode ( 7 ).

1 . A semiconductor integrated circuit device, comprising:
 a first electrode including a first semiconductor layer formed on a substrate;   a side surface insulating film formed on at least a part of a side surface of the first electrode;   an upper surface insulating film formed on the first electrode and the side surface insulating film; and   a second electrode which covers the side surface insulating film and the upper surface insulating film, wherein:   the first electrode, the side surface insulating film, and the second electrode constitute a capacitor element; and   a thickness of the upper surface insulating film between the first electrode and the second electrode is larger than a thickness of the side surface insulating film between the first electrode and the second electrode.   
     
     
         2 . A semiconductor integrated circuit device according to  claim 1 , wherein the second electrode comprises a polysilicon layer having an impurity implanted thereinto. 
     
     
         3 . A semiconductor integrated circuit device according to  claim 2 , wherein a conductivity type of the first electrode is the same as a conductivity type of the second electrode. 
     
     
         4 . A semiconductor integrated circuit device according to  claim 3 , wherein:
 an impurity concentration of the second electrode is higher than an impurity concentration of the first electrode;   the first electrode is connected to a ground potential; and   the second electrode is connected to a power supply potential.   
     
     
         5 . A semiconductor integrated circuit device according to  claim 2 , wherein a conductivity type of the first electrode is different from a conductivity type of the second electrode. 
     
     
         6 . A semiconductor integrated circuit device according to  claim 1 , wherein the upper surface insulating film and the side surface insulating film are formed of different materials. 
     
     
         7 . A semiconductor integrated circuit device according to  claim 1 , wherein the upper surface insulating film comprises a plurality of laminated insulating films. 
     
     
         8 . A semiconductor integrated circuit device according to  claim 1 , wherein the first electrode comprises:
 a capacitor element formation portion covered by the second electrode; and   a coupling portion which is not covered by the second electrode and couples a plurality of the capacitor element formation portions.   
     
     
         9 . A semiconductor integrated circuit device according to  claim 1 , further comprising a fin-type field effect transistor, the fin-type field effect transistor comprising:
 a second semiconductor layer which protrudes with respect to the plane of the substrate and includes a channel region, a source region, and a drain region;   a gate insulating film formed on the channel region; and   a gate electrode formed on the gate insulating film.   
     
     
         10 . A semiconductor integrated circuit device according to  claim 1 , wherein the capacitor element comprises:
 a first capacitor element having the first electrode connected to a power supply potential and the second electrode connected to a ground potential; and   a second capacitor element having the first electrode connected to the ground potential and the second electrode connected to the power supply potential.   
     
     
         11 . A semiconductor integrated circuit device, comprising:
 a substrate;   a semiconductor layer formed on the substrate;   an insulating layer formed on the semiconductor layer; and   an electrode layer formed on the insulating layer, wherein:   at least a part of the semiconductor layer, the insulating layer, and the electrode layer constitutes a fin-type field effect transistor portion including a channel region, a source region, and a drain region which are formed as the semiconductor layer, a gate insulating film formed as the insulating layer, and a gate electrode formed as the electrode layer;   at least another part of the semiconductor layer, the insulating layer, and the electrode layer constitutes a capacitor element portion including a first electrode formed as the semiconductor layer, an insulating film formed as the insulating layer, and a second electrode formed as the electrode layer; and   a thickness of the insulating film on an upper surface of the first electrode of the capacitor element portion in a direction perpendicular to a plane of the substrate is larger than a thickness of the insulating film on a side surface of the first electrode of the capacitor element portion in a direction parallel to the plane of the substrate.   
     
     
         12 . A semiconductor integrated circuit device according to  claim 11 , wherein a capacitance of a part of the capacitor element portion which is formed on the upper surface of the first electrode is smaller than a capacitance of another part of the capacitor element portion which is formed on the side surface of the first electrode. 
     
     
         13 . A semiconductor integrated circuit device according to  claim 11 , wherein an area of a surface of the capacitor element portion which extends in the direction parallel to the substrate on the upper surface of the first electrode is smaller than an area of another surface of the capacitor element portion which extends in the direction perpendicular to the substrate on the side surface of the first electrode. 
     
     
         14 . A semiconductor integrated circuit device according to  claim 11 , wherein, when the substrate is seen from above, an area occupied by the fin-type field effect transistor portion is larger than an area occupied by the capacitor element portion. 
     
     
         15 . A semiconductor integrated circuit device according to  claim 11 , wherein the fin-type field effect transistor portion and the capacitor element portion are formed in the semiconductor layer which forms a protrusion. 
     
     
         16 . A method of manufacturing a semiconductor integrated circuit device, comprising:
 forming in the same process a first semiconductor layer on a substrate and includes a first electrode of a capacitor element, and a second semiconductor layer which includes a channel region, a source region, and a drain region of a fin-type field effect transistor;   forming in the same process an insulating film of the capacitor element and an insulating film of the fin-type field effect transistor; and   forming in the same process a second electrode of the capacitor element and a gate electrode of the fin-type field effect transistor,   whereby the capacitor element and the fin-type field effect transistor are formed on the same substrate.   
     
     
         17 . A method of manufacturing a semiconductor integrated circuit device according to  claim 16 , further comprising performing in the same process impurity implantation into a capacitor element formation portion of the first electrode covered by the second electrode and impurity implantation into the channel region. 
     
     
         18 . A method of manufacturing a semiconductor integrated circuit device according to  claim 16 , wherein:
 the forming in the same process a second electrode of the capacitor element and a gate electrode of the fin-type field effect transistor comprises forming the second electrode and the gate electrode using a polysilicon layer; and   the method further comprises performing in the same process impurity implantation into the second electrode, impurity implantation into the gate electrode, and impurity implantation into the source region and the drain region.   
     
     
         19 . A method of manufacturing a semiconductor integrated circuit device according to  claim 16 , further comprising:
 performing in the same process impurity implantation into a capacitor element formation portion and impurity implantation into the channel region of a fin-type field effect transistor of a first conductivity type; and   performing in the same process impurity implantation into the second electrode and impurity implantation into the source region and the drain region of a fin-type field effect transistor of a second conductivity type,   whereby the capacitor element in which a conductivity type of the first electrode is the same as a conductivity type of the second electrode, the fin-type field effect transistor of the first conductivity type, and the fin-type field effect transistor of the second conductivity type are formed.