Tft-lcd array substrate and manufacturing method thereof

Abstract

The invention relates to a thin film transistor liquid crystal display (TFT-LCD) array substrate and a manufacturing method thereof. The TFT-LCD array substrate comprises a gate line and a data line that define a pixel region, wherein the pixel region is provided with a thin film transistor, a pixel electrode formed on the array substrate, and a storage electrode of transparent structure that overlaps with the pixel electrode and, together with the pixel electrode, constitutes a storage capacitor.

1 . A thin film transistor liquid crystal display (TFT-LCD) array substrate, comprising a gate line and a data line that define a pixel region,
 wherein the pixel region is provided with a thin film transistor, a pixel electrode formed on a base substrate, and a storage electrode of transparent structure that overlaps with the pixel electrode and, together with the pixel electrode, constitutes a storage capacitor.   
     
     
         2 . The TFT-LCD array substrate according to  claim 1 , wherein the thin film transistor comprises:
 a light-blocking metal layer, formed on the base substrate;   a first insulating layer, formed on the light-blocking metal layer;   a semiconductor layer, formed on the first insulating layer;   a doped semiconductor layer, formed on the semiconductor layer;   a source electrode, one end of which is formed on the doped semiconductor layer through a transparent conductive layer, and the other end of which is connected with the data line;   a drain electrode, one end of which is formed on the doped semiconductor layer through the transparent conductive layer, wherein the transparent conductive layer below the drain electrode is continuously formed together with the pixel electrode, and thus the other end of the drain electrode is directly connected with the pixel electrode;   a thin film transistor (TFT) channel region, formed between the source electrode and the drain electrode, in which the transparent conductive layer and the doped semiconductor layer are completely etched and the semiconductor layer is partially etched in the thickness direction thereof, so as to expose the semiconductor layer in the TFT channel region;   a second insulating layer, formed to cover the entire surface of the base substrate;   a gate electrode, formed on the second insulating layer and above the TFT channel region and connected with the gate line; and   a third insulating layer, formed on the gate electrode and the gate line and covering the entire surface of the base substrate.   
     
     
         3 . The TFT-LCD array substrate according to  claim 2 ,
 wherein the storage electrode is made of a material selected from the group consisting of indium tin oxide, indium zinc oxide and aluminum zinc oxide, and is formed on the third insulating layer.   
     
     
         4 . The TFT-LCD array substrate according to  claim 3 ,
 wherein the storage electrode, a gate pad via hole, and a data pad via hole are formed in one single patterning, process.   
     
     
         5 . The TFT-LCD array substrate according to  claim 2 ,
 wherein the light-blocking metal layer, the first insulating layer, the semiconductor layer, and the doped semiconductor layer are formed in one single patterning process.   
     
     
         6 . The TFT-LCD array substrate according to  claim 1 ,
 wherein the data line and the pixel electrode are formed in one single patterning process.   
     
     
         7 . The TFT-LCD array substrate according to  claim 2 ,
 wherein the data line and the pixel electrode are formed in one single patterning process.   
     
     
         8 . A method of manufacturing a thin film transistor liquid crystal display (TFT-LCD) array substrate, comprising steps of:
 Step 1, depositing, successively, a light-blocking metal film, a first insulating layer, a semiconductor film, and a doped semiconductor film on a base substrate, and forming a pattern including a light-blocking metal layer and an active layer with a patterning process;   Step 2, depositing, successively, a transparent conductive film and a source and drain metal film on the base substrate after Step 1, and forming a pattern including a data line, a drain electrode, a source electrode, a thin film transistor (TFT) channel region, and a pixel electrode with a patterning process, wherein the drain electrode is directly connected with the pixel electrode through the transparent conductive layer, and the transparent conductive layer below the drain electrode is continuously formed together with the pixel electrode;   Step 3, depositing, successively, a second insulating layer and a gate metal film on the base substrate after Step 2, and forming a pattern including a gate electrode and a gate line with a patterning process, wherein the gate electrode is located above the TFT channel region; and   Step 4, depositing, successively, a third insulating layer and a transparent conductive film on the base substrate after Step 3, and forming a pattern including a storage electrode, a gate pad via hole, and a data pad via hole, wherein the storage electrode overlaps with the pixel electrode and, together with the pixel electrode, constitutes a storage capacitor.   
     
     
         9 . The method of manufacturing the TFT-LCD array substrate according to  claim 8 , wherein the Step 1 includes:
 depositing the light-blocking metal film on the base substrate by magnetron sputtering or thermal evaporation;   depositing, successively, the first insulating layer, the semiconductor film, and the doped semiconductor film in this order by plasma enhanced chemical vapor deposition (PECVD); and   patterning the doped semiconductor film, the semiconductor film, the first insulating layer, and the light-blocking metal film by a patterning process with a normal mask to form a pattern including the light-blocking metal layer and the active layer.   
     
     
         10 . The method of manufacturing the TFT-LCD array substrate according to  claim 8 , wherein the Step 2 includes:
 depositing, successively, the transparent conductive film and the source and drain metal film by magnetron sputtering or thermal evaporation;   applying a photoresist layer on the source and drain metal film;   performing a exposing process through using a half-tone mask or a gray-tone mask to form a photoresist-completely-removed region, a photoresist-wholly-retained region, and a photoresist-partially-retained region, wherein the photoresist-wholly-retained region corresponds to the region where a pattern to be formed of the data line, the source electrode, and the drain electrode is, the photoresist-partially-retained region corresponds to the region where a pattern to be formed of the pixel electrode is, and the photoresist-completely-removed region corresponds to the region other than the above regions, and wherein after a developing process, the thickness of the photoresist in the photoresist-wholly-retained region remains unchanged, the photoresist in the photoresist-completely-removed region is completely removed, and the thickness of the photoresist in the photoresist-partially-retained region is reduced;   completely etching the source and drain metal film and the transparent conductive film in the photoresist-completely-removed region by a first etching process, so as to form a pattern of the data line, the source electrode, the drain electrode, and the TFT channel region, wherein one end of the source electrode is formed on the active layer and the other end of the source electrode is connected with the data line, one end of the drain electrode is formed on the active layer against the source electrode, the TFT channel region is formed between the source electrode and the drain electrode, and the source and drain metal film, the transparent conductive film, and the doped semiconductor layer in the TFT channel region are completely etched, and the semiconductor layer in the TFT channel region is partially etched in the thickness direction thereof, so as to expose the semiconductor layer in the TFT channel region;   removing the photoresist in the photoresist-partially-retained region by an ashing process to expose the source and drain metal film in this region;   completely etching the source and drain metal film in the photoresist-partially-retained region by a second etching process, so as to form a pattern of the pixel electrode, wherein the pixel electrode is directly connected with the drain electrode; and   peeling off the remaining photoresist.   
     
     
         11 . The method of manufacturing the TFT-LCD array substrate according to  claim 8 , wherein the Step 3 includes:
 depositing the second insulating layer by plasma enhanced chemical vapor deposition (PECVD);   depositing the gate metal film by magnetron sputtering or thermal evaporation; and   patterning the gate metal film by a patterning process with a normal mask to form a pattern including the gate electrode and the gate line, wherein the gate electrode is located above the TFT channel region.   
     
     
         12 . The method of manufacturing the TFT-LCD array substrate according to  claim 8 , wherein the step 4 includes:
 depositing the third insulating layer by plasma enhanced chemical vapor deposition (PECVD);   depositing the transparent conductive film by magnetron sputtering or thermal evaporation;   applying a photoresist layer on the transparent conductive film;   performing a exposing process by using a half-tone mask or a gray-tone mask to form a photoresist-completely-removed region, a photoresist-wholly-retained region and a photoresist-partially-retained region, wherein the photoresist-completely-removed region corresponds to the region where a pattern to be formed of the gate pad via hole and the data pad via hole is, the photoresist-wholly-retained region corresponds to the region where a pattern to be formed of the storage electrode is, and the photoresist-partially-retained region corresponds to the region other than the above regions, and wherein after a developing process, the thickness of the photoresist in the photoresist-wholly-retained region remains unchanged, the photoresist in the photoresist-completely-removed region is completely removed, and the thickness of the photoresist in the photoresist-partially-retained region is reduced;   completely etching the transparent conductive film and the corresponding insulating film in the photoresist-completely-removed region by a first etching process, so as to form a pattern of the gate pad via hole and the data pad via hole;   removing the photoresist in the photoresist-partially-retained region by an ashing, process to expose the transparent conductive film in this region;   completely etching the transparent conductive film in the photoresist-partially-retained region by a second etching process to form a pattern of the storage electrode; and   peeling off the remaining photoresist.