Method of Forming Nanotube Vertical Field Effect Transistor

Abstract

A nanotube field effect transistor and a method of fabrication are disclosed. The method includes electrophoretic deposition of a nanotube to contact a region of a conductive layer defined by an aperture.

1 - 15 . (canceled) 
     
     
         16 . A semiconductor device, comprising:
 a substrate having at least one horizontal complementary metal oxide semiconductor (CMOS) device, the CMOS having at least three metal interconnect levels;   a vertical carbon nanotube field effect transistor (CNT-FET) formed over the CMOS device, the vertical CNT-FET including a first insulating layer on a first conductive layer, the first insulating layer: (i) having an aperture formed therein exposing a region of the first conductive layer, with a deposited nanotube having a first end in contact with the exposed region of the first conductive layer, and (ii) configured to generate an electric field around the aperture;   wherein the vertical CNT-FET has a source, a drain and a gate formed from materials in the respective three metal interconnect levels of the CMOS device;   wherein the aperture is sized to allow a plurality of nanotubes to contact the exposed region of the first conductive layer; and   wherein after the nanotube is deposited, the deposited nanotube is adapted to re-configure the electric field to thereby prevent other nanotubes from being deposited on the exposed region of the first conductive layer.   
     
     
         17 . The device of  claim 16 , wherein the aperture has a diameter of at least about 40 nm. 
     
     
         18 . The device of  claim 16 , wherein the aperture has a diameter of at least about 90 nm. 
     
     
         19 . The device of  claim 16 , wherein the aperture has a diameter of at least about 100 nm. 
     
     
         20 . The device of  claim 16 , wherein the aperture has an aspect ratio of aperture depth to aperture diameter of at least about 0.18. 
     
     
         21 . The device of  claim 16 , wherein the nanotube is a electrophoretically deposited nanotube. 
     
     
         22 . The device of  claim 16 , wherein the nanotube is a single-walled carbon nanotube. 
     
     
         23 . The device of  claim 16 , wherein the first end of the deposited nanotube contacts the exposed region of the first conductive layer substantially in the center of the exposed region of the first conductive layer. 
     
     
         24 . A nanotube field effect transistor comprising:
 a first insulating layer on a first conductive layer, the first insulating layer: (i) having an aperture formed therein exposing a region of the first conductive layer, with a deposited nanotube having a first end in contact with the exposed region of the first conductive layer, and (ii) configured to generate an electric field around the aperture;   wherein the aperture is sized to allow a plurality of nanotubes to contact the exposed region of the first conductive layer; and   wherein after the nanotube is deposited, the deposited nanotube is adapted to re-configure the electric field to thereby prevent other nanotubes from being deposited on the exposed region of the first conductive layer.   
     
     
         25 . The nanotube field effect transistor of  claim 24 , wherein the aperture has a diameter of at least about 40 nm. 
     
     
         26 . The nanotube field effect transistor of  claim 24 , wherein the aperture has a diameter of at least about 90 nm. 
     
     
         27 . The nanotube field effect transistor of  claim 24 , wherein the aperture has a diameter of at least about 100 nm. 
     
     
         28 . The nanotube field effect transistor of  claim 24 , wherein the aperture has an aspect ratio of aperture depth to aperture diameter of at least about 0.18. 
     
     
         29 . The nanotube field effect transistor of  claim 24 , wherein the first conductive layer forms one of a source or a drain. 
     
     
         30 . The nanotube field effect transistor of  claim 24 , wherein the nanotube is a electrophoretically deposited nanotube. 
     
     
         31 . The nanotube field effect transistor of  claim 24 , wherein the nanotube is a single-walled carbon nanotube. 
     
     
         32 . The nanotube field effect transistor of  claims 24 , wherein the first end of the deposited nanotube contacts the exposed region of the first conductive layer substantially in the center of the exposed region of the first conductive layer; 
     
     
         33 . A nanotube field effect transistor comprising:
 a multi-layer stack having materials in an order of: a first conductive layer, a first insulating layer, a second conductive layer, and a second insulating layer;   the second insulating layer: (i) having a first aperture formed in at least a top portion of the second insulating layer, and (ii) configured to generate an electric field around the first aperture;   the second conductive layer and the first insulating layer having a second aperture formed therein exposing a region of the first conductive layer, with a deposited nanotube having a first end in contact with the exposed region of the first conductive layer;   wherein the first and second apertures are sized to allow a plurality of nanotubes to contact the exposed region of the first conductive layer; and   wherein after the nanotube is deposited, the deposited nanotube is adapted to re-configure the electric field to thereby prevent other nanotubes from being deposited on the exposed region of the first conductive layer.   
     
     
         34 . The nanotube field effect transistor of  claim 33 , wherein the second aperture has a diameter of at least about 40 nm. 
     
     
         35 . The nanotube field effect transistor of  claim 33 , wherein the second aperture has a diameter of at least about 90 nm. 
     
     
         36 . The nanotube field effect transistor of  claim 33 , wherein the nanotube is a electrophoretically deposited nanotube. 
     
     
         37 . The nanotube field effect transistor of  claim 33 , wherein the first conductive layer forms one of a source or a drain, and the second conductive layer forms a gate. 
     
     
         38 . The nanotube field effect transistor of  claim 33 , wherein the first end of the deposited nanotube contacts the exposed region of the first conductive layer substantially in the center of the exposed region of the first conductive layer.