Method for fabricating semiconductor device

Abstract

A semiconductor device includes a device isolation structure formed on a semiconductor substrate to define an active region. A first Si-based epitaxial pattern is formed over the active region corresponding to a bit line contact region and a portion of a gate region at both sides adjacent to the bit line contact region. A second Si-based epitaxial layer is formed over the semiconductor substrate which is stepped up on the first Si-based epitaxial pattern. A stepped gate pattern is formed over the stepped second Si-based epitaxial layer.

1 .- 3 . (canceled) 
   
   
       4 . A method for fabricating a semiconductor device, the method comprising:
 forming a first Si-based epitaxial pattern over a semiconductor substrate corresponding to a bit line contact region and a portion of gate regions adjacent to the bit line contact region;   forming a second Si-based epitaxial layer over the semiconductor substrate, wherein the second Si-based epitaxial layer is stepped up on the first Si-based epitaxial pattern;   etching the second Si-based epitaxial layer, the first Si-based epitaxial pattern, and a portion of the semiconductor substrate by using a device isolation mask to form a trench defining an active region;   removing a portion of the first Si-based epitaxial pattern through a sidewall of the trench to form an undercut space;   forming a device isolation structure to fill the under-cut space and the trench;   forming a gate insulating film over the stepped second Si-based epitaxial layer; and   forming a stepped gate pattern over the semiconductor substrate including the stepped second Si-based epitaxial layer.   
   
   
       5 . The method according to  claim 4 , wherein the process of forming a first Si-based epitaxial pattern comprises:
 forming a SiGe epitaxial layer and a first Si-based epitaxial layer over a semiconductor substrate;   forming a photoresist film over the semiconductor substrate;   exposing and developing the photoresist film to form a photoresist pattern covering the first Si-based epitaxial layer corresponding to the bit line contact region and a portion of a gate region at both sides adjacent to the bit line contact region; and   etching the Si-based epitaxial layer and the SiGe epitaxial layer by using the photoresist pattern as an etching mask.   
   
   
       6 . The method according to  claim 5 , wherein the line width of the photoresist pattern is N, where F<N≦7/3F and F is a distance between two neighboring gate regions). 
   
   
       7 . The method according to  claim 4 , wherein a thickness of the second Si-based epitaxial layer is in a range of about 10˜100 nm. 
   
   
       8 . The method according to  claim 4 , wherein the process of removing a portion of the first Si-based epitaxial pattern is performed through one method selected from the group consisting of a wet etching method, a plasma etching method and a combination thereof, wherein the wet etching method utilizes a mixed etchant containing HF, H 2 O 2  and CH 3 COOH, and the plasma etching method utilizes a mixed gas containing (CF 4  or CH 2 F 2 ), N 2  and O 2 . 
   
   
       9 . The method according to claim B, wherein a volume ratio of HF, H 2 O 2  and CH 3 COOH in the mixed etchant is about 1:2:3. 
   
   
       10 . The method according to  claim 4 , wherein the process of forming a device isolation structure comprises:
 forming a thermal oxide film to fill the under-cut space; and   forming an oxide film for a device isolation to fill the trench.   
   
   
       11 . The method according to  claim 10 , further comprising forming a nitride film at the interface of the thermal oxide film and the oxide film for the device isolation. 
   
   
       12 . The method according to  claim 4 , wherein the process of forming a device isolation structure comprises:
 forming a thermal oxide film to fill a portion of the under-cut space;   forming a nitride film to fill a remaining portion of the under-cut space; and   forming an oxide film for the device isolation to fill the trench.   
   
   
       13 .- 14 . (canceled) 
   
   
       15 . A method for fabricating a semiconductor device, the method comprising:
 forming a first Si-based epitaxial pattern over a semiconductor substrate corresponding to a bit line contact region and a portion of gate regions adjacent to the bit line contact region;   forming a second Si-based epitaxial layer over the semiconductor substrate;   etching the second Si-based epitaxial layer, the first Si-based epitaxial pattern, and a portion of the semiconductor substrate by using a device isolation mask to form a trench defining an active region;   removing a portion of the first Si-based epitaxial pattern through a sidewall of the trench to form an undercut space;   forming a device isolation structure to fill the under-cut space and the trench;   forming a gate insulating film over the stepped second Si-based epitaxial layer; and   forming a stepped gate pattern over the semiconductor substrate including the stepped second Si-based epitaxial layer,   wherein the method is characterized in that the second Si-based epitaxial layer is stepped up on the first Si-based epitaxial pattern.