US2010188536A1PendingUtilityA1

Solid-state imaging element, solid-state imaging device, camera, and drive method

Assignee: PANASONIC CORPPriority: Jul 31, 2007Filed: Jul 9, 2008Published: Jul 29, 2010
Est. expiryJul 31, 2027(~1 yrs left)· nominal 20-yr term from priority
H04N 25/709H04N 25/622H10F 39/80
47
PatentIndex Score
0
Cited by
0
References
0
Claims

Abstract

The semiconductor element according to an aspect of the present invention is a solid-state imaging element formed on a semiconductor substrate, having an overflow drain structure for draining excessive charges generated in photoelectric conversion elements, and reading out signal charges accumulated in the photoelectric conversion elements to a vertical transfer unit via a readout gate electrode. The solid-state imaging element includes: a first voltage generating circuit which applies, to the semiconductor substrate, substrate voltage defining the height of overflow barrier in the overflow drain structure; and a second voltage generating circuit which selectively generates first voltage and second voltage each including the height of pulse wave superimposed onto the substrate voltage, at a time when readout pulse to be applied to the readout gate electrode is generated.

Claims

exact text as granted — not AI-modified
1 . A solid-state imaging element formed on a semiconductor substrate, having an overflow drain structure for draining excess charges generated in photoelectric conversion elements, and reading out signal charges accumulated in the photoelectric conversion elements to a vertical transfer unit via a readout gate electrode, said solid-state imaging element comprising:
 a first voltage generating circuit which applies a substrate voltage to the semiconductor substrate, the substrate voltage defining a height of an overflow barrier in the overflow drain structure; and   a second voltage generating circuit which selectively generates a first voltage and a second voltage at a time when a readout pulse to be applied to the readout gate electrode is generated, the first voltage and the second voltage each indicating a height of a pulse wave superimposed onto the substrate voltage.   
     
     
         2 . The solid-state imaging element according to  claim 1 ,
 wherein said second voltage generating circuit:   generates the first voltage in a first mixing mode in which signal charges of N photoelectric conversion elements are mixed in the vertical transfer unit; and   generates the second voltage higher than the first voltage in a second mixing mode in which signal charges of M photoelectric conversion elements are mixed, M being greater than N.   
     
     
         3 . The solid-state imaging element according to  claim 2 ,
 wherein said second voltage generating circuit includes:   a resistive circuit which includes resistive elements connected in series, and outputs the first voltage and the second voltage by a voltage division; and   a switch circuit which includes an input terminal to which a switch signal indicating the first voltage or the second voltage is inputted, and switches an output of said resistive circuit between the first voltage and the second voltage according to the switch signal.   
     
     
         4 . The solid-state imaging element according to  claim 3 ,
 wherein the switch signal is switched immediately after the readout pulse is generated in a field period or a frame period, each of the field period and the frame period being a period immediately before switching into the first mixing mode or the second mixing mode.   
     
     
         5 . The solid-state imaging element according to  claim 3 ,
 wherein said switch circuit includes a switch transistor which is connected in parallel with a first resistive element among said resistive elements, and   said switch transistor includes a gate connected to said input terminal.   
     
     
         6 . The solid-state imaging element according to  claim 3 ,
 wherein said second voltage generating circuit further includes a constant current source connected in series with said resistive elements.   
     
     
         7 . The solid-state imaging element according to  claim 3 ,
 wherein said second voltage generating circuit further includes a voltage buffer circuit which drives the first voltage or the second voltage outputted from said resistive circuit.   
     
     
         8 . The solid-state imaging element according to  claim 3 ,
 wherein said switch circuit further includes at least one fuse circuit which is connected in parallel with a resistive element among said resistive elements.   
     
     
         9 . The solid-state imaging element according to  claim 8 ,
 wherein said switch circuit further includes at least two pads which receive power for blowing said fuse circuit.   
     
     
         10 . A solid-state imaging device formed on a semiconductor substrate, having an overflow drain structure for draining excess charges generated in photoelectric conversion elements, and reading out signal charges accumulated in the photoelectric conversion elements to a vertical transfer unit via a readout gate electrode, said solid-state imaging device comprising:
 a first voltage generating circuit which applies a substrate voltage to the semiconductor substrate, the substrate voltage defining a height of an overflow barrier in the overflow drain structure;   a second voltage generating circuit which selectively generates a first voltage and a second voltage at a time when a readout pulse to be applied to the readout gate electrode is generated, the first voltage and the second voltage each indicating a height of a pulse wave superimposed onto the substrate voltage; and   a drive unit configured to drive the vertical transfer unit.   
     
     
         11 . The solid-state imaging device according to  claim 10 ,
 wherein said drive unit is configured (i) to drive the photoelectric conversion elements and the vertical transfer unit such that signal charges of N photoelectric conversion elements are mixed in the vertical transfer unit in a first mixing mode, and (ii) to drive the photoelectric conversion elements and the vertical transfer unit such that signal charges of M photoelectric conversion elements are mixed in a second mixing mode, M being greater than N,   said second voltage generating circuit generates the first voltage in the first mixing mode, and generates the second voltage higher than the first voltage in the second mixing mode, and   said drive unit is configured: (i) to superimpose, in the first mixing mode, a pulse of the first voltage onto the substrate voltage at a time when the readout pulse is generated, and (ii) to superimpose, in the second mixing mode, a pulse of the second voltage onto the substrate voltage at a time when the readout pulse is generated.   
     
     
         12 . The solid-state imaging device according to  claim 11 ,
 wherein said second voltage generating circuit includes:   a resistive circuit which includes resistive elements connected in series, and outputs the first voltage and the second voltage by a voltage division; and   a switch circuit which includes an input terminal to which a switch signal indicating the first voltage or the second voltage is inputted, and switches an output of said resistive circuit between the first voltage and the second voltage according to the switch signal.   
     
     
         13 . The solid-state imaging device according to  claim 12 ,
 wherein the switch signal is switched immediately after the readout pulse is generated in a field period or a frame period, each of the field period and the frame period being a period immediately before switching into the first mixing mode or the second mixing mode.   
     
     
         14 . The solid-state imaging device according to  claim 11 ,
 wherein said switch circuit includes a switch transistor which is connected in parallel with a first resistive element among said resistive elements, and   said switch transistor includes a gate connected to said input terminal.   
     
     
         15 . The solid-state imaging device according to  claim 12 ,
 wherein said second voltage generating circuit further includes a constant current source connected in series with the resistive elements.   
     
     
         16 . The solid-state imaging device according to  claim 11 ,
 wherein said second voltage generating circuit further includes a voltage buffer circuit which drives the first voltage or the second voltage outputted from said resistive circuit.   
     
     
         17 . The solid-state imaging device according to  claim 11 ,
 wherein said switch circuit further includes at least one fuse circuit which is connected in parallel with a resistive element among said resistive elements.   
     
     
         18 . The solid-state imaging device according to  claim 17 ,
 wherein said switch circuit further includes at least two pads which receive power for blowing said fuse circuit.   
     
     
         19 . A camera comprising the solid-state imaging device according to  claim 10 . 
     
     
         20 . A drive method of a solid-state imaging device formed on a semiconductor substrate, having an overflow drain structure for draining excessive charges generated in photoelectric conversion elements, and reading out signal charges accumulated in the photoelectric conversion elements to a vertical transfer unit via a readout gate electrode, said drive method comprising:
 applying a substrate voltage to the semiconductor substrate, the substrate voltage defining a height of an overflow barrier in the overflow drain structure; and   superimposing the substrate voltage onto a pulse of a first voltage at a time when a readout pulse to be applied to the readout gate electrode is generated, in a first mixing mode in which the vertical transfer unit mixes signal charges of N photoelectric conversion elements, and   superimposing the substrate voltage onto a pulse of a second voltage higher than the first voltage at a time when the readout pulse is generated, in a second mixing mode in which the vertical transfer unit mixes signal charges of M photoelectric conversion elements, M being greater than N.

Join the waitlist — get patent alerts

Track US2010188536A1 — get alerts on status changes and closely related new filings.

We store only your email — no account needed. See our privacy policy.