US2010187614A1PendingUtilityA1
Selective nitridation of gate oxides
Est. expiryJan 22, 2024(expired)· nominal 20-yr term from priority
H10D 84/0181H10D 84/038
45
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Claims
Abstract
A method of fabricating a semiconductor structure. The method includes forming a first feature of a first active device and a second feature of a second active device, introducing a first amount of nitrogen into the first feature of the first active device, and introducing a second amount of nitrogen into the second feature of the second active device, the second amount of nitrogen being different from the first amount of nitrogen.
Claims
exact text as granted — not AI-modified1 . A semiconductor structure comprising:
a semiconductor substrate; a first active device formed on the substrate, the first active device having a first gate dielectric, which has a first concentration of nitrogen; and a second active device formed on the substrate, the second active device having a second gate dielectric, which has a second concentration of nitrogen different than the first concentration of nitrogen, wherein the second gate dielectric is thicker than the first gate dielectric.
2 . A semiconductor structure according to claim 1 , wherein:
the first gate dielectric has a first thickness susceptible to appreciable dopant diffusion and current leakage; and the second gate dielectric has a second thickness susceptible to appreciable dopant diffusion and current leakage.
3 . A semiconductor structure according to claim 2 , wherein the second concentration of nitrogen is less than the first concentration of nitrogen.
4 . A semiconductor structure according to claim 3 , wherein the second active device is a p-channel field effect transistor and the first active device is an n-channel field effect transistor.
5 . A semiconductor structure according to claim 1 , wherein the first dielectric gate has a first thickness being susceptible to appreciable dopant diffusion or current leakage; and the second dielectric gate having a second thickness not being susceptible to appreciable dopant diffusion or current leakage.
6 . A semiconductor structure according to claim 5 , wherein the second concentration of nitrogen is less than the first concentration of nitrogen.
7 . A semiconductor structure according to claim 2 , wherein the first thickness and second thickness are less than about fifty angstroms.
8 . A semiconductor structure according to claim 5 , wherein the first thickness is less than about fifty angstroms; and the second thickness is about fifty angstroms or greater.
9 . A semiconductor structure according to claim 1 , wherein the first concentration of nitrogen and the second concentration of nitrogen were selectively introduced by one or more processes including one of:
rapid thermal nitridation; furnace nitridation; remote plasma nitridation; decoupled plasma nitridation; well implantation; and polysilicon implantation.
10 . A semiconductor structure according to claim 1 , wherein the first concentration of nitrogen is about 8×10 14 to 1×10 22 atoms/centimeter 2 .
11 . A semiconductor structure according to claim 1 , wherein the first concentration of nitrogen is sufficient to prevent appreciable gate leakage and dopant penetration in the first dielectric gate without causing an appreciable threshold-voltage shift in the first dielectric gate.
12 . A semiconductor structure according to claim 11 , wherein the second concentration of nitrogen is about 1×10 13 to 1×10 15 atoms/centimeter 2 .
13 . A semiconductor structure according to claim 1 , wherein the second concentration of nitrogen is sufficient to prevent appreciable gate leakage and dopant penetration in the second dielectric gate without causing an appreciable threshold-voltage shift in the second dielectric gate.
14 . The semiconductor structure of claim 1 , wherein the first gate dielectric has a first thickness and the second gate dielectric has a second thickness greater than the first thickness, and wherein the second concentration of nitrogen is less than the first concentration of nitrogen.
15 . The semiconductor structure of claim 14 , wherein the first active device is a p-well and the second active device is an n-well.
16 . The semiconductor structure of claim 15 , wherein the first active device is a n-FET and the second active device is an p-FET.
17 . The semiconductor structure of claim 16 , wherein the first and second gate dielectrics are each an oxynitride layer.
18 . The semiconductor structure of claim 14 , wherein the first and second gate dielectrics are each an oxynitride layer.
19 . The semiconductor structure of claim 18 , wherein the first active device is a p-well or an n-FET and the second active device is an n-well or a p-FET.
20 . The semiconductor structure of claim 19 , wherein:
the nFET has a nitrogen enriched interface between a well and a gate of the nFET; and the pFET has a nitrogen enriched interface between a well and a gate of the pFET.Join the waitlist — get patent alerts
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