Nitride semiconductor substrate
Abstract
There is provided a nitride semiconductor substrate. The nitride semiconductor substrate comprises a substrate, a patterned epitaxy layer, a protective layer and a gallium nitride semiconductor layer. The patterned epitaxy layer is disposed on the substrate, wherein the patterned epitaxy layer comprises a pier structure and the patterned epitaxy layer has an upper surface and a lower surface opposite to the upper surface and the lower surface faces to the substrate. The protective layer covers a portion of the upper surface of the patterned epitaxy layer to expose a top surface of the pier structure. The gallium nitride (GaN) semiconductor layer extends substantially across an entire area above the patterned epitaxy layer and connected to the exposed top surface of the pier structure.
Claims
exact text as granted — not AI-modified1 . A nitride semiconductor substrate, comprising:
a substrate; a patterned epitaxy layer disposed on the substrate, wherein the patterned epitaxy layer comprises a pier structure and the patterned epitaxy layer has an upper surface and a lower surface opposite to the upper surface and the lower surface faces to the substrate; a protective layer only covering a portion of the upper surface of the patterned epitaxy layer to expose a top surface of the pier structure; and a gallium nitride (GaN) semiconductor layer extending substantially across an entire area above the patterned epitaxy layer and connected to the exposed top surface of the pier structure.
2 . The nitride semiconductor substrate of claim 1 , wherein the material of the substrate comprises silicon, silicon carbide, sapphire, arsenide, phosphide, zinc oxide (ZnO), and magnesium oxide.
3 . The nitride semiconductor substrate of claim 1 , wherein the material of the protective layer comprises dielectric material.
4 . The nitride semiconductor substrate of claim 1 , wherein a shape of a cross-sectional profile of the pier structure comprises a point shape and a bar shape.Join the waitlist — get patent alerts
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